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PDF LMX2315 Data sheet ( Hoja de datos )
| Número de pieza | LMX2315 | |
| Descripción | Frequency Synthesizer for RF Personal Communications | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LMX2315 (archivo pdf) en la parte inferior de esta página. Total 22 Páginas | ||
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September 1996
LMX2315 LMX2320 LMX2325 PLLatinumTM
Frequency Synthesizer
for RF Personal Communications
LMX2325 2 5 GHz
LMX2320 2 0 GHz
LMX2315 1 2 GHz
General Description
The LMX2315 2320 2325’s are high performance frequen-
cy synthesizers with integrated prescalers designed for RF
operation up to 2 5 GHz They are fabricated using Nation-
al’s ABiC IV BiCMOS process
A 64 65 or a 128 129 divide ratio can be selected for the
LMX2315 and LMX2320 RF synthesizer at input frequencies
of up to 1 2 GHz and 2 0 GHz while 32 33 and 64 65 divide
ratios are available in the 2 5 GHz LMX2325 Using a propri-
etary digital phase locked loop technique the LMX2315
2320 2325’s linear phase detector characteristics can gen-
erate very stable low noise signals for controlling a local
oscillator
Serial data is transferred into the LMX2320 and the
LMX2325 via a three line MICROWIRETM interface (Data
Enable Clock) Supply voltage can range from 2 7V to 5 5V
The LMX2315 LMX2320 and the LMX2325 feature very low
current consumption typically 6 mA 10 mA and 11 mA re-
spectively
The LMX2315 LMX2320 and the LMX2325 are available in
a TSSOP 20-pin surface mount plastic package
Features
Y RF operation up to 2 5 GHz
Y 2 7V to 5 5V operation
Y Low current consumption
Y Dual modulus prescaler
LMX2325
32 33 or 64 65
LMX2320 LMX2315
64 65 or 128 129
Y Internal balanced low leakage charge pump
Y Power down feature for sleep mode
ICC e 30 mA (typ) at VCC e 3V
Y Small-outline plastic surface mount TSSOP 0 173
wide
Applications
Y Cellular telephone systems
(GSM IS-54 IS-95 (RCR-27)
Y Portable wireless communications (DECT PHS)
Y CATV
Y Other wireless communication systems
Block Diagram
TL W 12339 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation
MICROWIRETM and PLLatinumTM are trademarks of National Semiconductor Corporation
C1996 National Semiconductor Corporation TL W 12339
RRD-B30M106 Printed in U S A
http www national com
1 page  
Electrical CharacteristicsLMX2325 and LMX2320 VCC e VP e 3 0V LMX2315 VCC e VP e 5 0V b40 C k
TA k 85 C except as specified (Continued)
Symbol
Parameter
Conditions
Min Typ Max Units
IDo-source
IDo-sink
IDo-source
IDo-sink
IDo-Tri
Charge Pump Output Current
Charge Pump Output Current
Charge Pump TRI-STATE Current
VCC e VP e 3 0V VDo e VP 2
VCC e VP e 3 0V VDo e VP 2
VCC e VP e 5 0V VDo e VP 2
VCC e VP e 5 0V VDo e VP 2
0 5V s VDo s VP b 0 5V
T e 85 C
b2 5
b2 5
25
b5 0
50
25
mA
mA
mA
mA
nA
IDo vs VDo
Charge Pump Output Current
Magnitude Variation vs Voltage
(Note 1)
0 5V s VDo s VP b 0 5V
T e 25 C
15 %
IDo-sink vs
IDo-source
Charge Pump Output Current
Sink vs Source Mismatch
(Note 2)
VDo e VP 2
T e 25 C
10 %
IDovs T
Charge Pump Output Current
Magnitude Variation vs Temperature
(Note 3)
b40 C k T k 85 C
VDo e VP 2
10 %
VOH High-Level Output Voltage
IOH e b1 0 mA
VOL Low-Level Output Voltage
IOL e 1 0 mA
VOH
High-Level Output Voltage (OSCOUT) IOH e b200 mA
VOL Low-Level Output Voltage (OSCOUT) IOL e 200 mA
IOL
Open Drain Output Current (wp)
VCC e 5 0V VOL e 0 4V
IOH
Open Drain Output Current (wp)
VOH e 5 5V
RON
Analog Switch ON Resistance (2315)
tCS Data to Clock Set Up Time
See Data Input Timing
tCH Data to Clock Hold Time
See Data Input Timing
tCWH
Clock Pulse Width High
See Data Input Timing
tCWL
Clock Pulse Width Low
See Data Input Timing
tES Clock to Enable Set Up Time
See Data Input Timing
tEW Enable Pulse Width
See Data Input Timing
Except OSCOUT
Notes 1 2 3 See related equations in Charge Pump Current Specification Definitions
VCC b 0 8
V
04 V
VCC b 0 8
V
04 V
1 0 mA
100 mA
100 X
50 ns
10 ns
50 ns
50 ns
50 ns
50 ns
5 http www national com
5 Page 
Functional Description (Continued)
PROGRAMMABLE DIVIDER (N COUNTER)
The N counter consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B counter) If the Control
Bit (last bit shifted into the Data Register) is LOW data is transferred from the 19-bit shift register into a 7-bit latch (which sets
the 7-bit Swallow (A) Counter) and an 11-bit latch (which sets the 11-bit programmable (B) Counter) Serial data format is shown
below
Note S8 to S18 Programmable counter divide ratio control bits (3 to 2047)
TL W 12339 – 20
7-BIT SWALLOW COUNTER DIVIDE RATIO
(A COUNTER)
Divide S S S S S S S
Ratio 7 6 5 4 3 2 1
A
0 0000000
1 0000001
127 1 1 1 1 1 1 1
Note Divide ratio 0 to 127
BtA
11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO
(B COUNTER)
Divide S S S S S S S S S S S
Ratio 18 17 16 15 14 13 12 11 10 9 8
B
3 0 0 0 0 0 0 0 0 0 11
4 0 0 0 0 0 0 0 0 1 00
2047 1 1 1 1 1 1 1 1 1 1 1
Note Divide ratio 3 to 2047 (Divide ratios less than 3 are prohibited)
BtA
PULSE SWALLOW FUNCTION
fVCO e (P c B) a A c fOSC R
fVCO Output frequency of external voltage controlled oscil-
lator (VCO)
B Preset divide ratio of binary 11-bit programmable
counter (3 to 2047)
A Preset divide ratio of binary 7-bit swallow counter
(0 s A s 127 A s B)
fOSC Output frequency of the external reference frequency
oscillator
R Preset divide ratio of binary 14-bit programmable ref-
erence counter (3 to 16383)
P Preset modulus of dual moduIus prescaler (64 or 128
for 2315 20 or 32 or 64 for 2325)
11 http www national com
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet LMX2315.PDF ] | |
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