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PDF SI9712DY-T1 Data sheet ( Hoja de datos )
| Número de pieza | SI9712DY-T1 | |
| Descripción | PC Card (PCMCIA) Interface Switch- 12-V Suspend Capability | |
| Fabricantes | Vishay Siliconix | |
| Logotipo |  |
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Si9712
Vishay Siliconix
PC Card (PCMCIA) Interface Switch—12-V Suspend Capability
FEATURES
D Programmable VCC Ramp
D Smart Switching
D 12-V Sleepmode Compatible
D Extremely Low RON
D Reverse Blocking Switches
D VPP Programmable to 0, 12-V or VCC
D Safe Power-Up
D Low Power Consumption
D PC Card 3-V/5-V Compatible
D Logic Compatible Inputs
D Single SO-16 Package
DESCRIPTION
The Si9712 combines low on-resistance with slow ramp time
and smart switching for overall best performance in integrated
PC Card interface switches.
The Si9712 operates off the 5-V supply and has built-in level
shifting for gate drive. Internal logic protects against an
external control input error that would short 5 V to the 3.3-V
supply. This protection logic also allows the Si9712 to be
configured for positive or negative control logic for
compatibility with a variety of PC Card controllers. These
control inputs are CMOS logic compatible and can be driven
to 3.3 V or 5 V.
The Si9712 complies with the release of the PC Card standard
by suppling 0 V, 12 V, and VCC to the Vpp output and 0 V, 3.3 V,
and 5 V to the VCC output. The VCC ramp time is user
programmable with an external capacitor connected to the SR
pin.
The PC Card switch is packaged in a narrow body SO-16
package and is rated over the industrial temperature range
−40 to 85_C.
The Si9712 is available in both standard and lead (Pb)-free
packages.
FUNCTIONAL BLOCK DIAGRAM
+12 VIN
(14)
SW1
SW2
(3) VPP
(4) VPP
+5 VIN
+3.3 VIN
+3.3 VIN
SR
(12)
(10)
(11)
(16)
S1 (8)
S2 (9)
SW3
SW5
SW4
(13)
(5)
(6)
(7)
SW6
VCC
VCC
VCC
VCC
Switch Logic, Level Shift, and Drivers
(2) S4
(15) S3
(1) GND
Externally
Connect
On PCB
Document Number: 70024
S-40755—Rev. F, 19-Apr-04
www.vishay.com
1
1 page  
Si9712
Vishay Siliconix
ORDERING INFORMATION
Part Number Temperature Range
Package
Si9712DY
Si9712DY-T1
Si9712DY-T1—E3
−40 to 85_C
SOIC-16
TRUTH TABLEb
S1 S2 S3
000
000
001
001
010
010
011
011
100
100
101
101
110
110
111
111
S4 Switch 1a Switch 2a Switch 3 Switch 4
0 Off Off Off Off
1 Off Off Off On
0 Off Off On Off
1 Off Off Off Off
0 Off Off Off Off
1 Off On Off On
0 Off On On Off
1 Off Off Off Off
0 Off Off Off Off
1 On Off Off On
0 On Off On Off
1 Off Off Off Off
0 Off Off Off Off
1 On Off Off On
0 On Off On Off
1 Off Off Off Off
Notes
a. Turn on of switch 1 and 2 are internally delayed until after VCC is valid. See Figure 3.
b. Shaded lines are error conditions for PC Card applications, however, switches default to the states shown.
Switch 5
On
On
On
On
On
Off
Off
On
On
Off
Off
On
On
Off
Off
On
Switch 6
On
Off
Off
On
On
Off
Off
On
On
Off
Off
On
On
Off
Off
On
TIMING DIAGRAM
S1
S2 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
VPP
VCC
0
+12 VIN
É
Document Number: 70024
S-40755—Rev. F, 19-Apr-04
FIGURE 4. Break-Before-Make of SW1 and SW2
www.vishay.com
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet SI9712DY-T1.PDF ] | |
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