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PDF CXG1081TN Data sheet ( Hoja de datos )
| Número de pieza | CXG1081TN | |
| Descripción | Receiving Dual-Band Mixer | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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Receiving Dual-Band Mixer
CXG1081TN
Description
The CXG1081TN is a receiving dual-band mixer
MMIC. This IC is designed using the Sony's GaAs J-
FET process.
16 pin TSSOP (Plastic)
Features
• High conversion gain Gc = 9.5 to 10.0dB (Typ.)
• Low noise figure
NF = 4.6 to 4.7dB (Typ.)
• Single 2.7V power supply operation
• Low LO input power operation PLO = –15dBm
• Single CTL pin achieved by the built-in inverter circuit
• 10-pin small package
Applications
800MHz Japan digital cellular telephones (PDC)
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings (Ta = 25°C)
• Supply voltage
VDD 4.5
• Input power
PIN +5
• Current consumption IDD (Mixer block) 15
• Operating temperature Topr –35 to +85
• Storage temperature Tstg –65 to +150
V
dBm
mA
°C
°C
Recommended Operating Conditions
• Supply voltage
VDD
2.7 to 3.3
• Control voltage
VCTL (H) 2.4 to 3.3
VCTL (L) 0 to 0.3
V
V
V
Block Diagram
Pin Configuration
RFIN1 6
5 RFIN2
RFIN1 6
CTL 7
GND 8
VDD1 (LO AMP1) 9
IF OUT/VDD3 (MIX) 10
5 RFIN2
4 OPT
3 GND
2 VDD2 (LO AMP2)
1 LO IN
IF OUT 10
1 LO IN
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E99654A9Z-PS
1 page  
CXG1081TN
Path RFIN1 → IFOUT
GC, NF vs. PLO
12
GC
10
VDD = 2.7V
8 VCTL = 2.7V
fRF1 = 870MHz
fLO = 740MHz
6
NF
4
2
–25
–20 –15 –10
–5
PLO – LO input power [dBm]
0
8
7
6
5
4
3
2
1
–25
Path RFIN1 → IFOUT
IIP3, PLK vs. PLO
VDD = 2.7V
VCTL = 2.7V
fRF1 = 870MHz
fRF2 = 870.1MHz
fLO = 740MHz
PLK PLO = –15dBm
–22.5
–25
–27.5
–30
–32.5
–35
IIP3
–37.5
–20 –15 –10
–5
PLO – LO input power [dBm]
–40
0
Path RFIN2 → IFOUT
GC, NF vs. PLO
12
GC
10
VDD = 2.7V
8 VCTL = 0V
fRF2 = 820MHz
fLO = 690MHz
6
NF
4
2
–25
–20 –15 –10
–5
PLO – LO input power [dBm]
0
8
7
6
5
4
3
2
1
–25
Path RFIN2 → IFOUT
IIP3, PLK vs. PLO
VDD = 2.7V
VCTL = 0V
fRF1 = 820MHz
fRF2 = 820.1MHz
fLO = 690MHz
PLO = –15dBm
–22.5
–25
–27.5
PLK
–30
–32.5
–35
IIP3
–37.5
–20 –15 –10
–5
PLO – LO input power [dBm]
–40
0
–5–
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet CXG1081TN.PDF ] | |
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