파트넘버.co.kr D15 데이터시트 PDF


D15 반도체 회로 부품 판매점

Memory Micromodules General Information for D1/ D2 and C Packaging



STMicroelectronics 로고
STMicroelectronics
D15 데이터시트, 핀배열, 회로
CCD Vertical Clock Driver
CXD1267AN
Description
The CXD1267AN is a vertical clock driver for CCD
image sensors. This IC is the successor of the
CXD1250N with attractive features.
Power consumption is reduced approximately 30%
for the CXD1267AN version.
20 pin SSOP (Plastic)
Features
1) Substrate voltage (Vsub) generator is built-in.
Variable Vsub in the range of 4.0V to 18.5V.
Reduction of peripheral parts saves space.
2) Only two power supplies (+15V and –8.5V) are
needed.
3) 3.3V clock interface is acceptable.
4) 20-pin SSOP package is used.
5) Low power consumption
90mW (CXD1267N)
62mW (CXD1267AN)
approximately 30% reduction
Appllications
CCD cameras
Structure
CMOS
Absolute Maximum Ratings (Ta = 25°C)
Supply voltage
VL 0 to –10
Supply voltage
VH VL – 0.3 to 2VL + 35
Supply voltage
VM VL – 0.3 to 3.0
Input voltage
VI VL – 0.3 to VH + 0.3
Output voltage (V2, V4) MVφ VL – 0.3 to VM + 0.3
Output voltage (V1, V3) HVφ VL – 0.3 to VH + 0.3
Output voltage (VSHT)
HHVφ VL – 0.3 to VH + 0.3
Operational amplifier output current
IDCOUT
±5
Operating temperature
Topr
–25 to +85
Storage temperature Tstg –40 to +125
V
V
V
V
V
V
V
mA
°C
°C
Recommended Operating Conditions
Supply voltage
VH
Supply voltage
VM
Supply voltage
VL
Input voltage (except for pin 3)
VI
Operational amplifier input voltage
VIOP
Operating temperature
Topr
14.5 to 15.5
0
–6.0 to –9.0
0 to 6.0
1.0 to 4.5
–20 to +75
V
V
V
V
V
°C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E94X38-PK


D15 데이터시트, 핀배열, 회로
Block Diagram and Pin Configuration (Top View)
CPP3
1
VH
2
Charge Pump
CPP1
20
CPP2 19
DCIN
3
4 XSHT
XV2
5
XV1
6
XSG1
7
XV3
8
XSG2
9
XV4
10
DCOUT
18
VSHT
17
VL 16
Vφ2
15
Vφ1
14
VM 13
Vφ3
12
Vφ4
11
Pin Description
Pin No. Symbol
1 CPP3
2 VH
3 DCIN
4 XSHT
5 XV2
6 XV1
7 XSG1
8 XV3
9 XSG2
10 XV4
11 Vφ4
12 Vφ3
13 VM
14 Vφ1
15 Vφ2
16 VL
17 VSHT
18 DCOUT
19 CPP2
20 CPP1
I/O Description
O Charge pump
— Power supply (15V)
I Operational amplifier input
I Output control (VSHT)
I Output control (Vφ2)
I Output control (Vφ1)
I Output control (Vφ1)
I Output control (Vφ3)
I Output control (Vφ3)
I Output control (Vφ4)
O High-voltage output (2 levels: VM, VL)
O High-voltage output (3 levels: VH, VM, VL)
— GND
O High-voltage output (3 levels: VH, VM, VL)
O High-voltage output (2 levels: VM, VL)
— Power supply (–8.5V)
O High-voltage output (2 levels: VH, VL)
O Operational amplifier output
— Charge pump
— Charge pump
–2–
CXD1267AN




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