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PDF LTC1487CN8 Data sheet ( Hoja de datos )

Número de pieza LTC1487CN8
Descripción Ultra-Low Power RS485 with Low EMI/ Shutdown and High Input Impedance
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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LTC1487
Ultra-Low Power RS485
with Low EMI, Shutdown
and High Input Impedance
FEATURES
s High Input Impedance: Up to 256 Transceivers
on the Bus
s Low Power: ICC = 120µA Max with Driver Disabled
s ICC = 200µA Max with Driver Enabled, No Load
s 1µA Quiescent Current in Shutdown Mode
s Controlled Slew Rate Driver for Reduced EMI
s Single 5V Supply
s ESD Protection to ±10kV On Receiver Inputs and
Driver outputs
s – 7V to 12V Common-Mode Range Permits ±7V
Ground Difference Between Devices on the Data Line
s Thermal Shutdown Protection
s Power Up/Down Glitch-Free Driver Outputs Permit
Live Insertion or Removal of Transceiver
s Driver Maintains High Impedance in Three-State
or with the Power Off
s Pin Compatible with the LTC485
APPLICATI S
s Battery-Powered RS485/RS422 Applications
s Low Power RS485/RS422 Transceiver
s Level Translator
DESCRIPTIO
The LTC®1487 is an ultra-low power differential line trans-
ceiver designed with high impedance inputs allowing up to
256 transceivers to share a single bus. It meets the
requirements of RS485 and RS422. The LTC1487 features
output drivers with controlled slew rate, decreasing the
EMI radiated from the RS485 lines, and improving signal
fidelity with misterminated lines. The CMOS design offers
significant power savings without sacrificing ruggedness
against overload or ESD damage. Typical quiescent cur-
rent is only 80µA while operating and 1µA in shutdown.
The driver and receiver feature three-state outputs, with
the driver outputs maintaining high impedance over the
entire common-mode range. Excessive power dissipation
caused by bus contention or faults is prevented by a
thermal shutdown circuit which forces the driver outputs
into a high impedance state. The receiver has a fail-safe
feature which guarantees a high output state when the
inputs are left open. I/O pins are protected against multiple
ESD strikes of over ±10kV using the Human Body Model.
The LTC1487 is fully specified over the commercial tem-
perature range and is available in 8-pin DIP and SO
packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATI
LTC1487
RO 1
RE 2
DE 3
DI 4
R
D
2000 FEET OF TWISTED-PAIR WIRE
7
120
6
LTC1487
7
120
6
R 1 RO
2 RE
3 DE
D 4 DI
330
4.7nF
EQUIVALENT LOAD OF 256
LTC1487 TRANSCEIVERS
LTC1487 • TA01
DI
A
B
RO
LTC1487 • TA02
1

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LTC1487CN8 pdf
LTC1487
PIN FUNCTIONS
RO (Pin 1): Receiver Output. If the receiver output is
enabled (RE LOW), and A > B by 200mV, RO will be HIGH.
If A < B by 200mV, then RO will be LOW.
RE (Pin 2): Receiver Output Enable. A LOW enables the
receiver output, RO. A HIGH input forces the receiver
output into a high impedance state.
DE (Pin 3): Driver Outputs Enable. A HIGH on DE enables
the driver output. A and B and the chip will function as a line
driver. A LOW input will force the driver outputs into a high
impedance state and the chip will function as a line
receiver. If RE is HIGH and DE is LOW, the part will enter
a low power (1µA) shutdown state.
DI (Pin 4): Driver Input. If the driver outputs are enabled
(DE HIGH) then a LOW on DI forces the outputs A LOW and
B HIGH. A HIGH on DI with the driver outputs enabled will
force A HIGH and B LOW.
GND (Pin 5): Ground.
A (Pin 6): Driver Output/Receiver Input.
B (Pin 7): Driver Output/Receiver Input.
VCC (Pin 8): Positive Supply. 4.75V < VCC < 5.25V.
UU
FU CTIO TABLES
LTC1487 Transmitting
INPUTS
OUTPUTS
RE DE DI B A
X 1 1 01
X 1 0 10
0 0 X ZZ
1 0 X Z* Z*
*Shutdown mode
LTC1487 Receiving
INPUTS
RE DE A – B
0 0 0.2V
0 0 – 0.2V
0 0 Inputs Open
10
X
*Shutdown mode
OUTPUTS
RO
1
0
1
Z*
TEST CIRCUITS
A
VOD
R
R
B
LTC1487 • F01
VOC
Figure 1. Driver DC Test Load
3V
DE
A
DI
B
RDIFF
A
CL1
RO
B
CL2 RE 15pF
LTC1487 • F03
Figure 3. Driver/Receiver Timing Test Circuit
RECEIVER
OUTPUT
TEST POINT
S1
CRL 1k S2
1k
VCC
LTC1487 • F02
Figure 2. Receiver Timing Test Load
OUTPUT
UNDER TEST
500
CL
S1
VCC
S2
LTC1487 • F04
Figure 4. Driver Timing Test Load
5

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