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PDF AN6472NFBP Data sheet ( Hoja de datos )
| Número de pieza | AN6472NFBP | |
| Descripción | Cordless Telephone Speech Network IC Incorporating Cross-Point Switch | |
| Fabricantes | Panasonic Semiconductor | |
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ICs for Telephone
AN6472NFBP
Cordless Telephone Speech Network IC Incorporating
Cross-Point Switch
s Overview
The AN6472NFBP is a speech network IC which
includes a receiver noise reducing function and is most
suitable for quality cordless telephones. It incorporates a
cross-point switch controlled by serial input. It allows
speech path switching and mixing, and provides for
three- or four-person communication and other sophisti-
cated functions. It also incorporates REC/PLAY amplifiers
with VOX circuits.
s Features
• The speech block can operate on line voltage, with no
external power supply, and is operational even during a
commercial power failure.
• Incorporates a receiver noise reducing function to
improve the handset's howling margin.
• Incorporates auto. PAD, dial mute, DC voltage regula-
tion, and other basic speech functions.
• The cross-point switch can be operated independently.
• Each output of the cross-point switch can correspond to
multiple inputs, allowing three- or four-person commu-
nication.
• The REC/PLAY amplifiers incorporate ALC and VOX
circuits.
• Receiver volume can be increased by 6 dB or 9 dB.
64
1
Unit : mm
49
48
16
17
33
32
0.55
14.0±0.3
17.2±0.4
QFP package with 64 pins (QFH064-P-1414)
1
1 page  
ICs for Telephone
AN6472NFBP
s Electrical Characteristics (cont.) (Ta=25±2˚C)
Parameter
Symbol
Condition
min typ max Unit
Line DC voltage H (E-2)
Line DC voltage H (E-3)
Internal supply voltage (E)
Internal ref. supply voltage (E)
Total circuit current
Power interruption detection (1)
Power interruption detection (2)
VLH – E2
VLH – E3
Vreg – E
Vref – E
Itotal
V – HIT1
V – HIT2
V–DCC=LOW,
IL=60mA, VCC=5V
V–DCC=LOW,
IL=120mA, VCC=5V
V–DCC=HIGH,
IL=20mA, VCC=5V
V–DCC=HIGH,
IL=20mA, VCC=5V
V–DCC=HIGH,
IL=20mA, VCC=5V
VL=2.7V, VCC=5V
VL=1.5V, VCC=5V
5.3 5.95
7.55 8.2
4.6 4.85
2.25 2.5
17 27
0 0.1
4.4 4.95
6.6 V
8.9 V
5.0 V
2.7 V
35 mA
0.6 V
5V
Receiver During Power Failure
Rec. gain (I-1)
Rec. gain (I-2)
Rec. auto. PAD width (I)*1
Rec. max. output (I)
GV – IR1
GV – IR2
AP – IR
VO – IR
IL=30mA, VCC= 0V
Vin= – 42dBm
IL= 80mA, VCC= 0V
Vin= –42dBm
IL=30mA– 80mA, VCC= 0V,
Vin= – 42dBm
With IL=30mA, VCC= 0V, and
THD=5%
30.5 32.5 34.5
dB
27 29 31 dB
2.5 3.5
5 dB
04
dBm
Rec. noise reduction (I)
BT amp. gain (I)
NL – IR
GV – IBT
IL=30mA, VCC= 0V,
Vin= –42dBm
Vin–M= –65/–50dBm
IL=30mA, VCC= 0V,
V–DMC=LOW,
Vin= –30dBm
4 6 8 dB
19 21 23 dB
Receiver On External Power Supply
Rec. gain (E-1)
Rec. gain (E-2)
Rec. auto. PAD width (E)*1
Rec. max. output (E)
GV – ER1
GV – ER2
AP – ER
VO – ER
IL=30mA, VCC=5V
Vin= –42dBm
IL=30mA, VCC=5V
Vin= –42dBm
IL=30mA–80mA, VCC=5V
Vin= –42dBm
With IL=30mA, VCC=5V, and
THD=5%
30.5 32.5 34.5
dB
26.8 28.8 30.8
dB
2.5 3.7
5 dB
4 12
dBm
Rec. noise reduction (E)
Rec. digital volume (1)*2
Rec. digital volume (2)*2
BT amp. gain (E)
Rec. gain difference
NL – ER
GV – DV1
GV – DV2
GV – EBT
DG–R
IL=30mA, VCC=5V,
Vin= –42dBm
Vin–M= –65/–65dBm
IL=30mA, VCC=5V,
Vin= –42dBm, DV–1 ON
IL=30mA, VCC=5V,
Vin= –42dBm, DV–2 ON
IL=30mA, VCC=5V,
V–DMC=LOW,
Vin= –30dBm
For VCC=0V and 5V(between
Gv–IR1 and Gv–ER1)
6 8 10
567
7.5 9 10.5
19.5 21.5 23.5
–1.2 – 0.1
1.2
dB
dB
dB
dB
dB
Transmitter Amp. During Power Failure
Trans. gain (I-1)
GV – IM1
Trans. gain (I-2)
GV – IM2
Trans. auto. PAD width (I)*1
AP – IM
R=27Ω(Pin3), IL=30mA,
VCC=0V, Vin= –38dBm
IL=80mA, VCC=0V,
Vin= –38dBm
IL=30mA–80mA, VCC=0V,
Vin= –38dBm
28.2 30.2 32.2
24.4 26.4 28.4
2.5 3.8
5
dB
dB
dB
Note) Unless otherwise specified, input signal Fin =1kHz, control voltage V-DOC = high, and control voltage V-DMC = high.
*1 Gain decrease when line current IL is changed from 30 to 80 mA. If pin 11 (auto. PAD control)is connected to pin 61 (int.
supply voltage output), the gain will not change.
*2 Gain increase from receiver gain (E-1).
5
5 Page 
ICs for Telephone
AN6472NFBP
s Pin Descriptions (cont.)
Pin No. Pin name I/O
8
VN
DET
Waveform
Description
DC (with a capacitor) •Noise reduction detection amp. out-
put : A smoothing capacitor C6 and
Input R5 connect to this pin to adjust the
Full-wave detection
(with no capacitor)
attack and recovery times of noise
reduction.
VN
9 DET– I
IN
•Noise reduction detection amp. input
: Noise reduction amp. output is fed
through C7 and R6 to this pin.
Equivalent circuit
Vref–SN
+
–
95kΩ 10
Vref–SN
+
–
64kΩ
98
10
VN
OUT
O
•Noise reduction amp. output : 3kΩ 0.1µF
VREF Connects to the noise reduction
detection amp. input.
Remarks
•This pin must be
grounded if noise
reduction is not used.
•The greater C7, the lon-
ger the attack time. The
smaller R6, the shorter
the recovery time.
•Noise reduction detec-
tion amp. gain (G) is :
G=
64K
R6
11 APC
I
Vreg-R · I
IL
Auto. PAD control :
•Connects through a resistance to Pin
61(Vreg). If the resistance increases,
the PAD operates closer to the near
end. If the resistance decreases, the
PAD operates closer to the far end.
11
I
I∝ IL
12 RV IN I
13
RV
PREOUT
O
VREF – SN
VREF – SN
Rec. preamp. input :
•Receiver signals are input from
the side-tone circuit to this pin.
•R8 and C9 connected between
Pin 13 and this pin determine
the f. characteristics.
Rec. preamp. output :
•R8 and C9 connected between Pin 12
and this pin determine the f. charac-
teristics.
•The output impedance is up to 1 kΩ.
+
12 –
13
+ 10kΩ
–
13
The receiver preamplifier
gain (G) is :
G= –
1
1
R9
+
1
jωC9
R8 + jωC10
14
RV
FILTER
O
RV
OUT
15 (1)
·
16 RV
OUT
(2)
O
Rec. amp. input :
VREF – SN
VREF – SN
VREF – SN
Rec. amp. outputs (1 and 2) :
•A ceramic or dynamic receiver
is connected.
•The output circuit is a BTL
configuration.
•The output impedance is up to
50 Ω.
10kΩ
+
–
13 30kΩ
16
15
17
BT–
IN
I
18
MF –
OUT
O
VREF – SN
Signal input
BT signal input :
•BT (beep tone) signals are input
through C15 to this pin.
•Input impedance is 10 kΩ.
VREF – SN
DTMF preamp. output :
•A C/R combination between
Pin 19 and this pin determines
the f. characteristics of the
DTMF preamp.
17
10kΩ
+
–
Vref–SN
+
–
18
In the application circuit,
MIC. IN (–) is input
through a capacitor. This
capacitor and R12-R14,
and C15 and C16 deter-
mine the f. characteris-
tics.
19
MF –
IN
I
VREF – SN
Signal input
DTMF signal input :
•DTMF signals are input
through a capacitor to this pin.
•DTMF signals are enabled
when DMC is low at Pin 40.
Vref–SN
10kΩ
+
19 –
18
The 10 kΩ input impe-
dance and C12 or C13
form a HPF.
11
11 Page | ||
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| PDF Descargar | [ Datasheet AN6472NFBP.PDF ] | |
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