파트넘버.co.kr CAT24WC17 데이터시트 PDF


CAT24WC17 반도체 회로 부품 판매점

2K/4K/8K/16K-Bit Serial E2PROM



Catalyst Semiconductor 로고
Catalyst Semiconductor
CAT24WC17 데이터시트, 핀배열, 회로
Preliminary
CAT24WC03/05/09/17
2K/4K/8K/16K-Bit Serial E2PROM
FEATURES
s 400 KHZ I2C Bus Compatible*
s 1.8 to 6.0Volt Operation
s Low Power CMOS Technology
s Write Protect Feature
–Top 1/2 Array Protected When WP at VIH
s 16-Byte Page Write Buffer
DESCRIPTION
The CAT24WC03/05/09/17 is a 2K/4K/8K/16K-bit Serial
CMOS E2PROM internally organized as 256/512/1024/
2048 words of 8 bits each. Catalyst’s advanced CMOS
technology substantially reduces device power require-
PIN CONFIGURATION
DIP Package (P)
SOIC Package (J)
A0
A1
A2
VSS
1
2
3
4
8 VCC
A0
7 WP
A1
6 SCL
A2
5 SDA VSS
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
s Self-Timed Write Cycle with Auto-Clear
s 1,000,000 Program/Erase Cycles
s 100 Year Data Retention
s 8-pin DIP, 8-pin SOIC and 8-pin TSSOP Package
s Commercial, Industrial and Automotive
Temperature Ranges
ments. The CAT24WC03/05/09/17 features a 16-byte
page write buffer. The device operates via the I2C bus
serial interface, has a special write protection feature,
and is available in 8-pin DIP or 8-pin SOIC
BLOCK DIAGRAM
EXTERNAL LOAD
VCC
VSS
DOUT
ACK
WORD ADDRESS
BUFFERS
SENSE AMPS
SHIFT REGISTERS
COLUMN
DECODERS
A0
A1
A2
VSS
TSSOP Package (U)
(** Available for 24WC03 only)
18
27
SS
36
45
VCC
WP
SCL
SDA
SDA
WP
START/STOP
LOGIC
CONTROL
LOGIC
XDEC
E2PROM
PIN FUNCTIONS
Pin Name
Function
A0, A1, A2 Device Address Inputs
SDA
Serial Data/Address
SCL Serial Clock
WP Write Protect
VCC +1.8V to +6.0V Power Supply
VSS Ground
SCL
A0
A1
A2
STATE COUNTERS
SLAVE
ADDRESS
COMPARATORS
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol.
© 1999 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
DATA IN STORAGE
HIGH VOLTAGE/
TIMING CONTROL
24WCXX F03
Doc. No. 25063-00 2/98 S-1


CAT24WC17 데이터시트, 핀배열, 회로
CAT24WC03/05/09/17
Preliminary
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ................. –55°C to +125°C
Storage Temperature ....................... –65°C to +150°C
Voltage on Any Pin with
Respect to Ground(1) ........... –2.0V to +VCC + 2.0V
VCC with Respect to Ground ............... –2.0V to +7.0V
Package Power Dissipation
Capability (Ta = 25°C) .................................. 1.0W
Lead Soldering Temperature (10 secs) ............ 300°C
Output Short Circuit Current(2) ........................ 100mA
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of
the device at these or any other conditions outside of those
listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for
extended periods may affect device performance and
reliability.
RELIABILITY CHARACTERISTICS
Symbol
Parameter
Min.
NEND(3)
TDR(3)
VZAP(3)
ILTH(3)(4)
Endurance
Data Retention
ESD Susceptibility
Latch-up
1,000,000
100
2000
100
Max.
Units
Cycles/Byte
Years
Volts
mA
Reference Test Method
MIL-STD-883, Test Method 1033
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
D.C. OPERATING CHARACTERISTICS
VCC = +1.8V to +6.0V, unless otherwise specified.
Limits
Symbol
Parameter
Min.
Typ.
ICC Power Supply Current
IS(5) Standby Current (VCC = 5.0V)
ILI Input Leakage Current
ILO Output Leakage Current
VIL Input Low Voltage
–1
VIH Input High Voltage
VCC x 0.7
VOL1 Output Low Voltage (VCC = 3.0V)
VOL2 Output Low Voltage (VCC = 1.8V)
Max.
3
0
10
10
VCC x 0.3
VCC + 0.5
0.4
0.5
Units
mA
µA
µA
µA
V
V
V
V
Test Conditions
fSCL = 100 KHz
VIN = GND or VCC
VIN = GND to VCC
VOUT = GND to VCC
IOL = 3 mA
IOL = 1.5 mA
CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V
Symbol
Test
Max.
Units
Conditions
CI/O(3) Input/Output Capacitance (SDA)
8 pF
VI/O = 0V
CIN(3) Input Capacitance (A0, A1, A2, SCL, WP)
6
pF
VIN = 0V
Note:
(1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is VCC +0.5V, which may overshoot to VCC + 2.0V for periods of less than 20ns.
(2) Output shorted for no more than one second. No more than one output shorted at a time.
(3) This parameter is tested initially and after a design or process change that affects the parameter.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V.
(5) Standby Current (ISB) = 0µA (<900nA).
Doc. No. 25063-00 2/98 S-1
2




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