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Número de pieza | MG87FL4051 | |
Descripción | 8051-Based MCU | |
Fabricantes | Megawin | |
Logotipo | ||
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No Preview Available ! 8051-Based MCU
MG87FE/L2051/4051/6051
Data Sheet
Version: A1
This document contains information on a new product under development by Megawin. Megawin reserves the right to change or
discontinue this product without notice.
Megawin Technology Co., Ltd. 2012 All rights reserved.
2014/03 version A1
1 page Content
Features.............................................................................................................3
Content ..............................................................................................................5
1. General Description.....................................................................................7
2. Block Diagram.............................................................................................8
3. Pin Configurations .......................................................................................9
3.1. Package Instruction ............................................................................................................ 9
3.2. Pin Description (PDIP-20 & SOP-20)................................................................................ 10
4. 8051 CPU Function Description ................................................................11
4.1. CPU Register ................................................................................................................... 11
4.2. CPU Timing ...................................................................................................................... 11
4.3. CPU Addressing Mode ..................................................................................................... 12
5. Memory Organization ................................................................................13
5.1. On-Chip Program Flash.................................................................................................... 13
5.2. On-Chip Data RAM........................................................................................................... 14
6. Special Function Register..........................................................................15
6.1. SFR Map .......................................................................................................................... 15
6.2. SFR Bit Assignment ......................................................................................................... 16
7. Configurable I/O Ports...............................................................................18
7.1. IO Structure ...................................................................................................................... 18
7.1.1. Port1/3/4 GPIO Structure ........................................................................................... 18
7.2. Port1 Register .................................................................................................................. 18
7.3. Port3 Register .................................................................................................................. 18
7.4. Port4 Register .................................................................................................................. 19
7.5. GPIO Sample Code.......................................................................................................... 20
8. Interrupt.....................................................................................................21
8.1. Interrupt Structure............................................................................................................. 21
8.2. Interrupt Register.............................................................................................................. 22
9. Timers/Counters........................................................................................26
9.1. Timer0 and Timer1 ........................................................................................................... 26
9.1.1. Mode 0 Structure........................................................................................................ 26
9.1.2. Mode 1 Structure........................................................................................................ 26
9.1.3. Mode 2 Structure........................................................................................................ 26
9.1.4. Mode 3 Structure........................................................................................................ 27
9.1.5. Timer0/1 Register....................................................................................................... 28
9.2. Timer0/1 Sample Code..................................................................................................... 30
9.3. PWM-Timer ...................................................................................................................... 32
9.3.1. PWM-Timer Structure................................................................................................. 32
9.3.2. PWM-Timer Register.................................................................................................. 33
9.4. PWM Sample Code .......................................................................................................... 35
10. UART ........................................................................................................36
10.1.UART Structure ................................................................................................................ 36
10.2.UART Register ................................................................................................................. 37
10.3.Serial Port Sample Code .................................................................................................. 39
11. Analog Comparator ...................................................................................40
11.1.Analog Comparator Structure ........................................................................................... 40
11.2.Analog Comparator Register ............................................................................................ 40
12. Watch Dog Timer (WDT) ...........................................................................42
12.1.WDT Structure.................................................................................................................. 42
12.2.WDT Register................................................................................................................... 42
MEGAWIN
MG87FEL2051_4051_6051 Data Sheet
5
5 Page 4. 8051 CPU Function Description
4.1. CPU Register
PSW: Program Status Word
Address=D0H, read/write, Power On + RESET=0000-0000
7 6 543
CY AC F0 RS1 RS0
2
OV
1
F1
0
P
CY: Carry bit.
AC: Auxiliary carry bit.
F0: General purpose flag 0.
RS1: Register bank select bit 1.
RS0: Register bank select bit 0.
OV: Overflow flag.
F1: General purpose flag 1.
P: Parity bit.
The program status word(PSW) contains several status bits that reflect the current state of the CPU. The PSW,
shown above, resides in the SFR space. It contains the Carry bit, the Auxiliary Carry(for BCD operation), the two
register bank select bits, the Overflow flag, a Parity bit and two user-definable status flags.
The Carry bit, other than serving the function of a Carry bit in arithmetic operations, also serves as the “Accumulator”
for a number of Boolean operations.
The bits RS0 and RS1 are used to select one of the four register banks shown in the on-chip-data-RAM section. A
number of instructions refer to these RAM locations as R0 through R7.
The Parity bit reflects the number of 1s in the Accumulator. P=1 if the Accumulator contains an odd number of 1s and
otherwise P=0.
SP: Stack Pointer
Address=81H, read/write, Power On + RESET=0000-0111
7 6 543
SP[7]
SP[6]
SP[5]
SP[4]
SP[3]
2
SP[2]
1
SP[1]
0
SP[0]
DPL: Data Pointer Low
Address=82H, read/write, Power On + RESET=0000-0000
7 6 543
DPL[7]
DPL[6]
DPL[5]
DPL[4]
DPL[3]
2
DPL[2]
1
DPL[1]
0
DPL[0]
DPH: Data Pointer High
Address=83H, read/write, Power On + RESET=0000-0000
7 6 543
DPH[7] DPH[6] DPH[5] DPH[4] DPH[3]
2
DPH[2]
1
DPH[1]
0
DPH[0]
B: B Register
Address=F0H, read/write, Power On + RESET=0000-0000
7 6 543210
B[7] B[6] B[5] B[4] B[3] B[2] B[1] B[0]
4.2. CPU Timing
MEGAWIN
MG87FEL2051_4051_6051 Data Sheet
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet MG87FL4051.PDF ] |
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