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PDF CXD2555 Data sheet ( Hoja de datos )

Número de pieza CXD2555
Descripción AD/DA Converter For Audio Application
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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No Preview Available ! CXD2555 Hoja de datos, Descripción, Manual

® HI2555, CXD2555
September 1997
NOT RECOMMENDED FOR NEW DESIGNS
1-Bit, AD/DA Converter
For Audio Application
Features
Description
• Two-Channel AD/DA Converters and Their Respective
Digital Filters for Decimation and Oversampling Into a
Single Chip
The HI2555, CXD2555 is a 1-bit stereo AD/DA converter
featuring a 2nd-order DA system noise shaper. This LSI has
also built-in digital filters and provides good cost performance.
• Peripheral Analog Circuits for AD Converter Greatly
Reduces External Elements
• Distortion (Typ)
- ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.01%
- DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.008% (-3dB)
• S/N Ratio (Typ)
- ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86dB
- DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96dB
• Ripple in the Digital Filter Pass Band . . . . . . . ±0.05dB
• Attenuation in the Digital Filter Stop Band . . . . . . . .-45dB
Ordering Information
PART
NUMBER
HI2555JCQ
CXD2555Q
TEMP.
RANGE (oC)
PACKAGE
-20 to 75 48 Ld MPQF
-20 to 75 48 Ld MPQF
PKG. NO.
Q48.12x12-S
Q48.12x12-S
Functions
• Data Can Be Input/Output at Rate of 1 x fS with a Built-
In Digital Filter
• Simple Connection of Multiple HI2555, CXD2555s
Enable Multi-Channel System
• The 32-Slot Serial Data Interface Enables Independent
Selection of Data Frontward Packing/Rearward
Packing and MSB First/LSB First
• The Master Clock is Applicable to Four Sources
• 256fS, 512fS, 768fS, and 1024fS
• The Sampling Frequency May be Adjusted to Low fS
Frequencies Such as 16kHz or 8kHz, in Addition to
Normal Ones of 48kHz, 44.1kHz, and 32Hz
• Various Frequency Divider Clocks Can Be Output for
LSIs Chips Connected
Pinout
HI2555, CXD2555 (48 LEAD MQFP)
TOP VIEW
AVDD3
AOUT1-
AVSS3
UCLK
XCLK
XVDD
XTLI
XTLO
XVSS
AVSS4
AOUT2-
AVDD4
48 47 46 45 44 43 42 41 40 39 38 37
1 36
2 35
3 34
4 33
5 32
6 31
7 30
8 29
9 28
10 27
11 26
1213
14
15
16
17
18
19
20
21
22
23
25
24
XSL2
XSL1
XSL0
MLSL
MASL
DVSS
SOUT
SIN
BCK
LRCK
MS
DVDD
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
4-301
File Number 4121.1

1 page




CXD2555 pdf
HI2555, CXD2555
AC Electrical Specifications AVDD1 = AVDD 2 = AVDD 3 = AVDD 4 = XVDD = 5.0V ± 10%,
AVSS 1 = AVSS 2 = AVSS 3 = AVSS 4 = XVSS = DVSS = 0V, TA = -20oC to 75oC
PARAMETER
SYMBOL
TEST CONDITIONS
MIN MAX
SIN Setup Time
tsus
10 -
SIN Hold Time
ths
15 -
LRCK Setup Time
tsul Slave Mode
10 -
LRCK Hold Time
thl Slave Mode
15 -
LRCK Delay Time
SOUT Delay Time
SOUT Data Reset Time
tdl Master Mode CL = 130pF
tds CL = 60pF
tzd
-40 30
9 65
7 42
SOUT Data Erase Time
tdz
6 40
XTLI Pulse Width
twl fS = 48kHz, 256fS
(XSL0 = XSL1 = XSL2 = L)
40 60
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
Analog Specifications
AVDD1
AVSS 1
=
=
AVDD
AVSS
2
2
=
=
AVDD
AVSS
3
3
=
=
AVDD
AVSS
4
4
=
=
XVDD = 5.0V ± 10%,
XVSS = DVSS = 0V, TA
=
-20oC
to
75oC
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Overall Characteristics of ADC + DAC Connection: The following conditions apply unless otherwise specified: Input waveform = 1kHz
sine wave, 1.4VRMS (= 0dB) XTAI = 33.8688MHz (= 768fS, fS = 44.1kHz) CLR = MS = WO = Open (= 5V) SOUT and SIN directly coupled
S/N
A-Weighting Filter
80 86 - dB
THD + N
20kHz LPF
-
0.010
0.018
%
Dynamic Range
1kHz, - 60dB, 20kHz LPF
80 85 - dB
Channel Separation
20kHz, 0dB
- 96 - dB
Gain Difference Between Channels
- 0.1 - dB
Gain
Input Level
DC Offset (ADC Output)
RL = 3.9k
RIN = 0
RIN = 4.7k
-3 0 +3 dB
- 0.286 - VRMS
- 1.4 - VRMS
- 069F -
Hex
ADC Input Impedance
- 1.2 - k
Analog Specifications
AVDD1
AVSS 1
=
=
AVDD
AVSS
2
2
=
=
AVDD
AVSS
3
3
=
=
AVDD 4 = XVDD = 5.0V ± 10%,
AVSS 4 = XVSS = DVSS = 0V, TA
=
-20oC
to
75oC
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
DAC Specifications in Single Unit: The following conditions apply unless otherwise specified: Input data = 1kHz sine wave,full
scale (= 0dB), XTAI = 33.8688MHz (= 768fS, fS = 44.1kHz), CLR = MS = WO = Open (= 5V), MS = GND
S/N
A-Weighting Filter
92 96 - dB
THD + N
20kHz LPF
-
0.008
0.012
%
Dynamic Range
1kHz, - 60dB, 20kHz LPF
85 89 - dB
Channel Separation
20kHz, 0dB
- 100 -
dB
Gain Difference Between Channels
- 0.05 -
dB
Output Level
RL = 3.9k
1.80
1.93
2.10
VRMS
4-305

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CXD2555 arduino
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