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PDF LTC1278-4IN Data sheet ( Hoja de datos )

Número de pieza LTC1278-4IN
Descripción 12-Bit/ 500ksps Sampling A/D Converter with Shutdown
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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No Preview Available ! LTC1278-4IN Hoja de datos, Descripción, Manual

LTC1278
12-Bit, 500ksps Sampling
A/D Converter with Shutdown
FEATURES
s Single Supply 5V or ±5V Operation
s Two Speed Grades,500ksps (LTC1278-5)
400ksps (LTC1278-4)
s 70dB S/(N + D) and 74dB THD at Nyquist
s No Missing Codes Over Temperature
s 75mW (Typ) Power Dissipation
s Power Shutdown with Instant Wake-Up
s Internal Reference Can Be Overdriven Externally
s Internal Synchronized Clock; No Clock Required
s High Impedance Analog Input
s 0V to 5V or ±2.5V Input Range
s New Flexible, Friendly Parallel Interface to DSPs
and FIFOs
s 24-Pin Narrow PDIP and SW Packages
APPLICATI S
s High Speed Data Acquisition
s Digital Signal Processing
s Multiplexed Data Acquisition Systems
s Audio and Telecom Processing
s Spectrum Analysis
, LTC and LT are registered trademarks of Linear Technology Corporation.
DESCRIPTIO
The LTC®1278 is a 1.6µs, 500ksps, sampling 12-bit A/D
converter that draws only 75mW from a single 5V or ±5V
supplies. This easy-to-use device comes complete with
a 200ns sample-and-hold, a precision reference and an
internally trimmed clock. Unipolar and bipolar conver-
sion modes add to the flexibility of the ADC. The low
power dissipation is made even more attractive by a
8.5mW power-down feature. Instant wake-up from shut-
down allows the converter to be powered down even
during brief inactive periods.
The LTC1278 converts 0V to 5V unipolar inputs from a
single 5V supply and ±2.5V bipolar inputs from ±5V
supplies. Maximum DC specs include ±1LSB INL and
±1LSB DNL. Outstanding guaranteed AC performance
includes 70dB S/(N + D) and 78dB THD at the input
frequency of 100kHz over temperature.
The internal clock is trimmed for 1.6µs conversion time.
The clock automatically synchronizes to each sample
command, eliminating problems with asynchronous clock
noise found in competitive devices. A separate convert
start input and a data ready signal (BUSY) ease connec-
tions to FIFOs, DSPs and microprocessors.
TYPICAL APPLICATI
Single 5V Supply, 500kHz, 12-Bit Sampling A/D Converter
2.42V
REFERENCE
OUTPUT
+
10µF
ANALOG INPUT 1
(0V TO 5V) 2
0.1µF
3
4
5
6
7
8
9
12-BIT
PARALLEL
BUS
10
11
12
LTC1278-5
AIN
VREF
AGND
AVDD
VSS
BUSY
D11(MSB) CS
D10 RD
D9 CONVST
D8 SHDN
D7 DVDD
D6 D0
D5 D1
D4 D2
DGND
D3
24
23
22
21
20
19
18
17
16
15
14
13
5V
+
10µF
0.1µF
µP CONTROL
LINES
CONVERSION START INPUT
POWER DOWN INPUT
LTC1278 • TA01
Effective Bits and Signal-to-(Noise + Distortion)
vs Input Frequency
12
11
10 NYQUIST
9 FREQUENCY
8
7
6
5
4
3
2
1 fSAMPLE = 500kHz
0
10k 100k
INPUT FREQUENCY (Hz)
74
68
62
56
1M 2M
LT1278 G4
1

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LTC1278-4IN pdf
WU
TI I G CHARACTERISTICS (Note 5)
The q indicates specifications which apply over the full operating
temperature range; all other limits and typicals TA = 25°C.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND and
AGND wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below VSS (ground for unipolar
mode) or above VDD, they will be clamped by internal diodes. This product
can handle input currents greater than 60mA below VSS (ground for
unipolar mode) or above VDD without latch-up.
Note 4: When these pin voltages are taken below VSS (ground for unipolar
mode), they will be clamped by internal diodes. This product can handle
input currents greater than 60mA below VSS (ground for unipolar mode)
without latch-up. These pins are not clamped to VDD.
Note 5: AVDD = DVDD = VDD = 5V, (VSS = – 5V for bipolar mode), fSAMPLE =
400kHz (LTC1278-4), 500kHz (LTC1278-5), tr = tf = 5ns unless otherwise
specified.
Note 6: Linearity, offset and full-scale specifications apply for unipolar and
bipolar modes.
LTC1278
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve. The
deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from – 1/2LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: AIN must not exceed VDD or fall below VSS by more than 50mV for
specified accuracy. Therefore the minimum supply voltage for the unipolar
mode is 4.95V. The minimum for the bipolar mode is 4.75V, – 2.45V.
Note 12: The falling CONVST edge starts a conversion. If CONVST returns
high at a bit decision point during the conversion it can create small errors.
For best performance ensure that CONVST returns high either within 120ns
after conversion start (i.e., before the first bit decision) or after BUSY rises
(i.e., after the last bit test). See mode 1a and 1b (Figures 12 and 13) timing
diagrams.
TYPICAL PERFORMANCE CHARACTERISTICS
Integral Nonlinearity vs
Output Code
1.0
fSAMPLE = 500kHz
0.5
Differential Nonlinearity vs
Output Code
1.0
fSAMPLE = 500kHz
0.5
00
–0.5 –0.5
–1.0
0 512 1024 1536 2048 2560 3072 3584 4096
CODE
LT1278 G1
–1.0
0 512 1024 1536 2048 2560 3072 3584 4096
CODE
LT1278 G2
ENOBs and S/(N + D) vs
Input Frequency
12
11
10 NYQUIST
9 FREQUENCY
8
7
6
5
4
3
2
1 fSAMPLE = 500kHz
0
10k 100k
INPUT FREQUENCY (Hz)
74
68
62
56
1M 2M
LT1278 G4
5

5 Page





LTC1278-4IN arduino
LTC1278
APPLICATI S I FOR ATIO
conversion starts. Any op amp that settles in 200ns to
small current transients will allow maximum speed opera-
tion. If slower op amps are used, more settling time can be
provided by increasing the time between conversions.
Suitable devices capable of driving the ADC’s AIN input
include the LT1360, LT1220, LT1223 and LT1224 op
amps.
Internal Reference
The LTC1278 has an on-chip, temperature compensated,
curvature corrected, bandgap reference, which is factory
trimmed to 2.42V. It is internally connected to the DAC and
is available at Pin 2 to provide up to 1mA current to an
external load.
For minimum code transition noise the reference output
should be decoupled with a capacitor to filter wideband
noise from the reference (10µF tantalum in parallel with a
0.1µF ceramic).
The VREF pin can be driven with a DAC or other means to
provide input span adjustment in bipolar mode. The VREF
pin must be driven to at least 2.45V to prevent conflict with
the internal reference. The reference should be driven to
no more than 4.8V to keep the input span within the ±5V
supplies.
Figure 6 shows an LT1006 op amp driving the reference
pin. (In the unipolar mode, the input span is already 0V to
5V with the internal reference so driving the reference is
not recommended, since the input span will exceed the
supply and codes will be lost at the full scale.) Figure 7
shows a typical reference, the LT1019A-2.5 connected to
the LTC1278. This will provide an improved drift (equal to
the maximum 5ppm/°C of the LT1019A-2.5) and a ±2.582V
full scale.
INPUT RANGE
±1.033VREF(OUT)
+
LT1006
VREF(OUT) 2.45V
3
10µF
5V
LTC1278
AIN
VREF
AGND
–5V
LTC1278 F6
Figure 6. Driving the VREF with the LT1006 Op Amp
INPUT RANGE
± 2.58V
(= ±1.033 × VREF)
5V
VIN
VOUT
LT1019A-2.5
GND
3
10µF
5V
LTC1278
AIN
VREF
AGND
–5V
LTC1278 F7
Figure 7. Supplying a 2.5V Reference Voltage to the LTC1278
with the LT1019A-2.5
UNIPOLAR/BIPOLAR OPERATION AND ADJUSTMENT
Figure 8a shows the ideal input/output characteristics for
the LTC1278. The code transitions occur midway between
successive integer LSB values (i.e., 0.5LSB, 1.5LSB,
2.5LSB, ... FS – 1.5LSB). The output code is naturally
binary with 1LSB = FS/4096 = 5V/4096 = 1.22mV. Figure
8b shows the input/output transfer characteristics for the
bipolar mode in two’s complement format.
111...111
111...110
111...101
111...100
1LSB
=
FS
4096
=
5V
4096
UNIPOLAR
ZERO
000...011
000...010
000...001
000...000
0V 1
LSB
INPUT VOLTAGE (V)
FS – 1LSB
LTC1278 F8a
Figure 8a. LTC1278 Unipolar Transfer Characteristics
011...111
011...110
000...001
000...000
111...111
111...110
BIPOLAR
ZERO
100...001
100...000
FS = 5V
1LSB = FS/4096
– FS/2
–1 0V 1 FS/2 – 1LSB
LSB LSB
INPUT VOLTAGE (V)
LTC1278 • F8b
Figure 8b. LTC1278 Bipolar Transfer Characteristics
11

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