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PDF LTC4266A Data sheet ( Hoja de datos )
| Número de pieza | LTC4266A | |
| Descripción | Quad PoE/PoE+/LTPoE++ PSE Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LTC4266A (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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FEATURES
nn Four Independent PSE Channels
nn Compliant with IEEE 802.3at Type 1 and 2
nn Low Power Dissipation
nn 0.25Ω Sense Resistance Per Channel
nn Very High Reliability 4-Point PD Detection
nn 2-Point Forced Voltage
nn 2-Point Forced Current
nn High Capacitance Legacy Device Detection
nn 1MHz I2C Compatible Serial Control Interface
nn Midspan Backoff Timer
nn Supports 2-Pair and 4-Pair Output Power
nn Available in Multiple Power Grades
nn
nn
LTC4266A-1:
LTC4266A-2:
LLTTPPooEE++++™52.378W.7W
nn LTC4266A-3: LTPoE++ 70W
nn LTC4266A-4: LTPoE++ 90W
nn LTC4266C: PoE 13W
nn Available in 38-Lead 5mm × 7mm QFN Package
APPLICATIONS
nn LTPoE++ PSE Switches/Routers
nn LTPoE++ PSE Midspans
nn IEEE 802.3at Type 1 PSE Switches/Routers
nn IEEE 802.3at Type 1 PSE Midspans
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
LTPoE++ and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners.
LTC4266A/LTC4266C
Quad PoE/PoE+/LTPoE++
PSE Controller
DESCRIPTION
The LTC®4266A is a quad power sourcing equipment (PSE)
controller capable of delivering up to 90W of LTPoE++
power to a compatible LTPoE++ powered device (PD). A
proprietary detection/classification scheme allows mutual
identification between a LTPoE++ PSE and LTPoE++ PD
while remaining compatible and interoperable with existing
Type 1 (13W) and Type 2 (25.5W) PDs. The LTC4266A
feature set is a superset of the popular LTC4266. These
PSE controllers feature low RON external MOSFETs and
0.25Ω sense resistors which are especially important at
the LTPoE++ current levels to maintain the lowest possible
heat dissipation.
The LTC4266C targets fully automatic PSE systems power-
ing Type 1 (up to 13W) PDs.
Advanced power management features include: 14-bit
current monitoring ADCs, DAC-programmable current
limit, and versatile quick shutdown of preselected ports.
Advanced power management host software is available
under a no-cost license. PD discovery uses a proprietary
dual-mode 4-point detection mechanism ensuring excellent
immunity from false PD detection. The LTC4266 includes
an I2C serial interface operable up to 1MHz.
The LTC4266 is available in multiple power grades allow-
ing delivered PD power of 13W, 25.5W, 38.7W, 52.7W,
70W and 90W. These controllers are available in a 38-lead
5mm × 7mm QFN package.
TYPICAL APPLICATION
Complete 4-Port Ethernet High Power Source
3.3V 10Ω
+ SMAJ5.0A
10µF
10Ω
+
CBULK
–54V
SMAJ58A
TVSBULK
VDD AD0 AD1 AD2 AD3
0.1µF
DGND
SHDN1
SHDN2
SHDN3 SHDN4
LTC4266
AUTO MSD
RESET
MID SDAIN SCL
SDAOUT
INT
AGND
1µF
100V
VEE SENSE1 GATE1 OUT1 SENSE2 GATE2 OUT2 SENSE3 GATE3 OUT3 SENSE4 GATE4 OUT4
0.22µF 100V
×4
S1B
×4
For more information www.linear.com/LTC4266A
S1B
×4
–54V
PORT1
PORT2
PORT3
PORT4
4266AC TA01
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1 page  
LTC4266A/LTC4266C
E LECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications
unless otherwise noted. (Notes 3, 4)
are
at
TA
=
25°C.
AGND
–
VEE
=
54V,
AGND
=
DGND,
and
VDD
–
DGND
=
3.3V
SYMBOL PARAMETER
Timing Characteristics
CONDITIONS
MIN TYP MAX
UNITS
tDET
tDETDLY
tCLE
tCLEON
tME
tMEL
tPON
Detection Time
Detection Delay
Class Event Duration
Class Event Turn-On Duration
Mark Event Duration
Last Mark Event Duration
Power On Delay in AUTO Pin Mode
Turn On Rise Time
Turn On Ramp Rate
Fault Delay
Midspan Mode Detection Backoff
Beginning to End of Detection (Note 7)
l 270 290 310
From PD Connected to Port to Detection
Complete (Note 7)
l 300
470
(Note 7)
l 12
CPORT = 0.6µF (Note 7)
(Notes 7, 11)
l 0.1
l 8.6
(Notes 7, 11)
l 16
22
From End of Valid Detect to Application of
Power to Port (Note 7)
l
60
(AGND – VOUT): 10% to 90% of (AGND – VEE), l
CPORT = 0.15µF (Note 7)
15
24
CPORT = 0.15µF (Note 7)
l
10
From ICUT Fault to Next Detect
l 1.0
1.1
Rport = 15.5kΩ (Note 7)
l 2.3 2.5 2.7
ms
ms
ms
ms
ms
ms
ms
µs
V/µs
s
s
tSTART
tLIM
tCUT
Power Removal Detection Delay
Maximum Current Limit Duration During Port
Start-Up
Maximum Current Limit Duration After Port
Start-Up
Maximum Overcurrent Duration After Port
Start-Up
Maximum Overcurrent Duty Cycle
From Power Removal After tDIS to Next
Detect (Note 7)
(Note 7)
tLIM Enable = 1 (Notes 7, 12)
(Note 7)
(Note 7)
l 1.0 1.3 2.5
l 52 62.5 66
l 11.9
l 52 62.5 66
l 5.8 6.3 6.7
s
ms
ms
ms
%
tMPS
tDIS
tMSD
tSHDN
Maintain Power Signature (MPS) Pulse Width Current Pulse Width to Reset Disconnect
Sensitivity
Timer (Notes 7, 8)
l 1.6
3.6
Maintain Power Signature (MPS) Dropout Time (Note 7)
l 320 350 380
Masked Shut Down Delay
(Note 7)
l 6.5
Port Shut Down Delay
(Note 7)
l 6.5
I2C Watchdog Timer Duration
l 1.5
2
3
ms
ms
µs
µs
s
Minimum Pulse Width for Masked Shut Down (Note 7)
l3
µs
Minimum Pulse Width for SHDN
(Note 7)
l3
µs
Minimum Pulse Width for RESET
(Note 7)
l 4.5
µs
For more information www.linear.com/LTC4266A
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5 Page 
I2C TIMING DIAGRAMS
LTC4266A/LTC4266C
For more information www.linear.com/LTC4266A
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11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC4266A.PDF ] | |
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