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PDF LTC4263-1 Data sheet ( Hoja de datos )

Número de pieza LTC4263-1
Descripción High Power Single PSE Controller
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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LTC4263-1
High Power
Single PSE Controller
with Internal Switch
FEATURES
n 30W PSE Output Power
n IEEE 802®.3af Compatible
n Operation from a Single 56V Supply
n Fully Autonomous Operation Without a
Microcontroller
n Internal MOSFET with Thermal Protection
n Precision Inrush Control with Internal Sense Resistor
n Forced Current PD Detection for Noise Immunity
n AC and DC Disconnect Sensing
n Legacy PD Detection
n Robust Short-Circuit Protection
n Pin-Selectable Detection Backoff for Midspan PSEs
n LED Driver Indicates Port On and Blinks
Status Codes
n Available in a Miniature14-Pin 4mm × 3mm DFN
Package
APPLICATIONS
n High Power Endpoint/Midspan PSEs
n Single-Port or Multi-Port Power Injectors
n Low Port Count PSEs
n Environment B PSEs
n Standalone PSEs
DESCRIPTION
The LTC®4263-1 is a high power, single PSE controller for
use in Power over Ethernet systems. The internal current
limit and short-circuit protection are designed to provide
up to 30W of PSE output power for power hungry PoE
applications such as WAPs, security cameras and RFID
readers.
The LTC4263-1 includes IEEE 802.3af compliant PD detec-
tion circuitry along with selectable AC and DC disconnect
sensing, allowing seamless operation in conventional
IEEE 802.3af systems as well as propriety, high power
applications. The LTC4263-1 simplifies PSE implementa-
tion, needing only a single supply and a small number of
passive support components. Onboard control algorithms
provide complete PSE functionality without the need of a
microcontroller and built-in foldback and thermal shutdown
provide comprehensive fault protection. An LED pin indi-
cates the state of the port and detection backoff timing is
configurable for either endpoint or midspan operation.
The LTC4263-1 is available in a miniature 14-pin 4mm ×
3mm DFN package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Single-Port Fully Autonomous High Power PSE
+
ISOLATED
56V SUPPLY
0.1μF
100V
0.1μF
LTC4263-1
LED VDD5
LEGACY
MIDSPAN
VSS
SD
VSS VDD48
VSS OUT
VSS OUT
OSC ACOUT
1A
SMAJ58A
0.1μF
100V
TO PORT
MAGNETICS
42631 TA01
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LTC4263-1 pdf
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TYPICAL PERFORMANCE CHARACTERISTICS
LTC4263-1
Powering an IEEE 802.3af PD
Powering a Legacy PD with
470μF Bypass Capacitor
Overload Restart Delay
VDD48
DETECTION DETECTION
VOUT PHASE 1 PHASE 2
10V/DIV
VSS
100ms/DIV
POWER
ON
VDD48
VOUT
20V/DIV
VSS
42631 G01
600mA
IOUT
300mA/DIV
0mA
570mA CURRENT LIMIT
FOLDBACK
25ms/DIV
VDD48
LOAD
FULLY
CHARGED
42631 G02
VOUT
10V/DIV
VSS
IPORT
1A/DIV
tED
500ms/DIV
42631 G10
Midspan Backoff with Invalid PD
Overcurrent Response Time
VDD48
VOUT
2V/DIV
tDBO
RPORT = 15.5k
500ms/DIV
VDD48
VOUT
20V/DIV
VSS
600mA
IOUT
300mA/DIV
0mA
42631 G11
PORT OFF
tOVLD
LOAD
APPLIED
10ms/DIV
42631 G12
Response to PD Removal with
AC Disconnect Enabled
VDD48
VOUT
10V/DIV
VSS
PD REMOVAL
PORT OFF
tMPDO
50ms/DIV
42631 G13
Rapid Response to 1Ω Short
VDD48
VOUT
20V/DIV
VSS
IPORT 20A
20A/DIV 0A
1Ω SHORT
APPLIED
IPORT = CURRENT IN
1Ω RESISTOR APPLIED
TO OUTPUT OF CIRCUIT
ON FRONT PAGE
1μs/DIV
42631 G14
Rapid Response to
Momentary 33Ω Short
VDD48
VOUT
20V/DIV
VSS 33Ω SHORT APPLIED
SHORT
600mA
IPORT
CURRENT REMOVED
LIMIT ACTIVE
300mA/DIV
0mA
FOLDBACK CURRENT LIMIT
100μs/DIV
42631 G15
IPORT = CURRENT IN 33Ω RESISTOR APPLIED
TO OUTPUT OF CIRCUIT ON FRONT PAGE
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LTC4263-1
APPLICATIONS INFORMATION
accidentally powered. Disconnect with either AC or DC
methods using the LTC4263-1 is fully compliant and
insures safe power removal after PD disconnect. Com-
mand and control for the LTC4263-1 is handled internally
without the need of a microcontroller, thereby simplifying
system design.
LTC4263-1 OPERATION
Signature Detection
The IEEE 802.3af specification defines a specific pair-to-
pair signature resistance used to identify a device that
can accept power via its Ethernet connection. When the
port voltage is below 10V, an IEEE 802.3af compliant
PD will have an input resistance of approximately 25kΩ.
Figure 2 illustrates the relationship between the PD sig-
nature resistance and the required resistance ranges the
PSE must accept and reject. According to the IEEE 802.3af
specification, the PSE must accept PDs with signatures
between 19kΩ and 26.5kΩ and may or may not accept
resistances in the two ranges of 15kΩ to 19kΩ and 26.5kΩ
to 33kΩ. The black box in Figure 2 represents the typical
150Ω pair-to-pair termination used in Ethernet devices
like a computer’s network interface card (NIC) that cannot
accept power.
RESISTANCE 0Ω 10k 20k 30k
PD 150Ω (NIC)
PSE REJECT
23.75k 26.25k
ACCEPT
15k 19k
26.5k
REJECT
33k
42631 F02
Figure 2. IEEE 802.3af Signature Resistance Ranges
The LTC4263-1 checks for the signature resistance by
forcing two test currents on the port in sequence and
measuring the resulting voltages. It then subtracts the two
V-I points to determine the resistive slope while remov-
ing voltage offset caused by any series diodes or current
offset caused by leakage at the port (see Figure 3). The
LTC4263-1 will typically accept any PD resistance between
17kΩ and 29.7kΩ as a valid PD. Values outside this range
(excluding open and short-circuits) are reported to the
user by a code flashed via the LED pin.
255
FIRST
25k | SLOPE
DETECTION
POINT
180
SECOND
VALID PD DETECTION
POINT
0V-2V
OFFSET
VOLTAGE
42631 F03
Figure 3. PD 2-Point Detection
The LTC4263-1 uses a force-current detection method in
order to reduce noise sensitivity and provide a more robust
detection algorithm. The first test point is taken by forcing
a test current into the port, waiting a short time to allow
the line to settle and measuring the resulting voltage. This
result is stored and the second current is applied to the
port, allowed to settle and the voltage measured.
The LTC4263-1 will not power the port if the PD has more
than 5μF in parallel with its signature resistor unless legacy
mode is enabled.
The LTC4263-1 autonomously tests for a valid PD con-
nected to the port. It repeatedly queries the port every
580ms, or every 3.2s if midspan backoff mode is active
(see below). If detection is successful, it then powers up
the port.
Midspan Backoff
IEEE 802.3af requires the midspan PSE to wait two seconds
after a failed detection before attempting to detect again
unless the port resistance is greater than 500kΩ. This
requirement is to prevent the condition of an endpoint PSE
and a midspan PSE, connected to the same PD at the same
time, from each corrupting the PD signature and prevent-
ing power-on. After the first corrupted detection cycle, the
midspan PSE waits while the endpoint PSE completes
detection and turns the port on. If the midspan mode of
the LTC4263-1 is enabled by connecting the MIDSPAN
pin to VDD5, a 3.2 second delay occurs after every failed
detect cycle unless the result is an open circuit.
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