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PDF RPC2A Data sheet ( Hoja de datos )
| Número de pieza | RPC2A | |
| Descripción | UHF Radio Packet Controller | |
| Fabricantes | Radiometrix | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de RPC2A (archivo pdf) en la parte inferior de esta página. Total 27 Páginas | ||
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www.DataSheet4U.com
20 April 2007
Radiometrix
Hartcran House, 231 Kenton Lane, Harrow, HA3 8RP, England
Tel: +44 (0) 20 8909 9595, Fax: +44 (0) 20 8909 2233
RPC2A
UHF Radio Packet Controller
Modules: RPC2A-433-64: IC+BiM2A-433-64-S
IC’s:
RPC-000-DIL:
RPC-000-SO:
RPC-000-SS:
18 pin DIL IC
18 pin SO IC
20 pin SSOP IC
The RPC2A-433-64 is intelligent transceiver
modules, which enable a radio network/link to
be simply implemented between a number of
digital devices. The module combines a UHF
`rcaondtiroollterra. nsceiver and a 64kbps packet
The RPC2A-module
• Crystal controlled PLL FM circuitry for both Tx and Rx
• Reliable 75 meter in-building range, 300m open ground
• Built-in self-test / diagnostics / status LED’s
• Complies with ETSI EN 300 220-3
• Complies with ETSI EN 301 489-3
• Single 5V supply @ < 27mA
• 64kbps half duplex
• Free format packets of 1 - 27 bytes
• Packet framing and error checking are user transparent
• Collision avoidance (listen before transmit)
• Direct interface to 5V CMOS logic
• Power save mode
INTRODUCTION
The RPC2A is an enhanced replacement for original RPC-433-40 transceiver. It is a self-contained plug-
on radio port which requires only a simple antenna, 5V supply and a byte-wide I/O port on a host
microcontroller (or bi-directional PC port).
The module provides all the RF circuits and processor intensive low level packet formatting and packet
recovery functions required to inter-connect an number of microcontrollers in a radio network.
A data packet of 1 to 27 bytes downloaded by a Host microcontroller into the RPC2A's packet buffer is
transmitted by the RPC2A’s transceiver and will "appear" in the receive buffer of all the RPC2A's within
radio range.
A data packet received by the RPC2A’s transceiver is decoded, stored in a packet buffer and the Host
microcontroller signalled that a valid packet is waiting to be uploaded.
HOST
download
upload
figure 1: RPC2A + Host µ-controller
Radiometrix Ltd, RPC2A
transmit / receive
RPC2A
download
upload
HOST
page 1
1 page  
2 THE HOST INTERFACE
2.1 SIGNALS
It is recommended that the RPC2A be assigned to a byte wide bi-directional I/O port on the host
wprwowc.eDsastaoSrh.eTeht4eU.pcoomrt must be such that the 4 data lines can be direction controlled without affecting the 4
handshake line.
pin pin
name number
pin
function
I/O description
TXR
TXA
6 TX Request I/P Data transfer request from HOST to
RPC2A
7
TX Accept O/P
Data accept handshake back to HOST
RXR
RXA
8
RX Request O/P
Data transfer request from RPC2A to
HOST
9 RX Accept I/P Data accept handshake back to RPC2A
D0 2 Data 0 (4) Bi-dir 4 bit bi-directional data bus. Tri-state
D1 3 Data 1 (5) Bi-dir between packet transfers, Driven on
D2 4 Data 2 (6) Bi-dir receipt for Accept signal until packet
D3 5 Data 3 (7) Bi-dir transfer is complete.
notes: 1. The 4 Handshake lines are active low
2. The 4 Data lines true data
3. Logic levels are 5V CMOS, see electrical specifications
4. Input pins have a weak pull-up internally
RESET
The Reset signal, may either be driven by the host (recommended) or pulled up to Vcc via a
suitable resistor (10kΩ). A reset aborts any transfers in progress and restarts the Packet
Controller.
HOST DRIVEN RESET
Minimum low time: 1.0 µs, after reset is released (returned high). The host should allow a delay
1ms after reset for the RPC2A to initialise itself
During this delay the host must hold TXR high (unless DIAGNOSTIC MODES are required) and
RXR signal should be ignored.
Host
Processor
D0
D1
D2
D3
RPC2-433-64
BiM2A-433-64
Transceiver
RESET
figure 5: Host to RPC2A connection
Radiometrix Ltd, RPC2A
page 5
5 Page 
3.0 RPC2A’S SWITCHES
SWITCHES is memory location 00h in RAM, it contains 8 flags which are used to determine the RPC2A's
operation. On RPC2A reset, power-up or watchdog Time-Out it is loaded from location 08h (in
EEPROM). The default value is 00 hex - this is all functions deselected.
www.DataSheet4U.com
figure 12: Switches
3.1 PS0 & PS1 - POWER SAVING
The RPC2A has 4 levels of power saving selected by PS0 & PS1 in SWITCHES. Power saving is
achieved by shutting down the Transceiver and the RPC2A for a period of time (OFF-TIME) when the
RPC2A is in the Idle state (i.e. nothing happening). During the OFF period current is reduced to the
device leakage of <50 µA typ. The RPC2A will still respond immediately to a Host TX Request but
cannot receive radio signals. After the programmed OFF-TIME the RPC2A will wake itself up, turn the
receiver on and listen for valid preamble. ON time = PWR->RX (EEPROM address 05h) + 1ms = 4ms
(using RPC2A Default values) If preamble is found the RPC2A will stay ON and decode the packet, if
not
the RPC2A will shut down for another OFF time period.
Also see - WAKE-UP (address 02h of EEPROM) and paragraph 2.2.2 .
Radiometrix Ltd, RPC2A
page 11
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet RPC2A.PDF ] | |
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