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PDF SPC41A1 Data sheet ( Hoja de datos )
| Número de pieza | SPC41A1 | |
| Descripción | 40KB Sound Controller | |
| Fabricantes | Sunplus | |
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SPC41A1
40KB Sound Controller
SEP. 04, 2001
Version 1.3
SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO.
is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.
Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by
SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products
are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may
reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.
1 page  
SPC41A1
6. FUNCTIONAL DESCRIPTIONS
6.1. CPU
The 8-bit micro-processor of SPC41A1 is a high performance
processor equipped with Accumulator, Program Counter, X
Register, Stack pointer and Processor Status Register (this is the
same as the 6502 instruction structure). SPC41A1 is able to
perform with 6.0MHz (max.) depending on the application
specifications.
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6.2. Oscillator
The SPC41A1 supports AT-cut parallel resonant oscillated Crystal
/ Resonator or RC Oscillator or external clock sources by mask
option (select one from those three types). The design of
application circuit should follow the vendors’ specifications or
recommendations. The diagrams listed below are typical
X’TAL/ROSC circuits for most applications:
SPC41A1
SPC41A1
XI/R
20 pf
XO XI/R
20 pf
VDD
Rosc
XO
(a) Crystal or
Ceramic Resonator
Connections
(b) RC Oscillator
Connections
6.3. Bonding Option
The SPC41A1 has the following bonding option:
hSupports Crystal Resonator or Rosc (with bonding option).
6.4. ROM Area
The SPC41A1 provides a 40K-byte ROM that can be defined as
the program area, audio data area, or both. To access ROM,
users should program the BANK SELECT Register, choose bank,
and access address to fetch data.
6.5. RAM Area
The total RAM consists of 128 bytes (including Stack) at locations
from $80 through $FF.
6.6. Map of Memory and I/Os
*I/O PORT:
─ PORT IOA $0002
IOC $0004
IOD $0005
─ I/O CONFIG $0000
$0001
*NMI SOURCE:
─ INTA (from TIMER A)
*INT SOURCE:
─ INTA (from TIMER A)
─ INTB (from TIMER B)
─ CPU CLK / 1024
─ CPU CLK / 8192
─ CPU CLK / 65536
─ EXT INT
*MEMORY MAP (From ROM view)
$00000
HW register, I/Os
$00080
USER RAM and STACK
$00100
UNUSED
$00200
$00600
$08000
SUNPLUS TEST PROGRAM
USER'S PROGRAM &
DATA AREA
ROM BANK #0
DUMMY AREA
$0E000
ROM BANK #1
$0FFFF
6.7. Speech and Melody
Since the SPC41A1 provides a large ROM and wide range of CPU
operation speeds, it is most suitable for speech and melody
synthesis. For speech synthesis, the SPC41A1 can provide NMI
for accurate sampling frequency. Users can record or synthesize
the sound and digitize it into the ROM. The sound data can be
played back in the sequence of the control functions as designed
by the user's program. Several algorithms are recommended for
high fidelity and compression of sound including PCM, LOG PCM,
and ADPCM. For melody synthesis, the SPC41A1 provides dual
tone mode. Once the SPC41A1 enters the dual tone mode,
users only need to fill either TMA or TMB, or both TMA and TMB to
the tone frequency for each channel, and count the envelope of
each channel. The hardware will toggle the tone wave
automatically without INT.
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
5
SEP. 04, 2001
Version: 1.3
5 Page 
8.2. Application Circuit - (2)
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SPC41A1
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
11
SEP. 04, 2001
Version: 1.3
11 Page | ||
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| PDF Descargar | [ Datasheet SPC41A1.PDF ] | |
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