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PDF IRU3138 Data sheet ( Hoja de datos )
| Número de pieza | IRU3138 | |
| Descripción | SYNCHRONOUS PWM CONTROLLER | |
| Fabricantes | International Rectifier | |
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Data Sheet No. PD94701
IRU3138
SYNCHRONOUS PWM CONTROLLER
FOR TERMINATION POWER SUPPLY APPLICATIONS
FEATURES
1A Peak Output Drive Capability
0.8V Precision Reference Voltage Available
Shuts off both drivers at shorted output
and shutdown
200KHz to 400KHz operation set by an external
resistor
www.DataSheet4U.comSoft-Start Function
Uncommitted Error Amplifier available for DDR
voltage tracking application
Protects the output when control FET is shorted
Synchronous Controller in 14-Pin Package
APPLICATIONS
DDR memory source sink Vtt application
Graphic Card
Low cost on-board DC to DC such as
5V to 3.3V, 2.5V or 1.8V
DESCRIPTION
The IRU3138 controller IC is designed to provide a low
cost synchronous Buck regulator for voltage tracking
applications such DDR memory and general purpose
on-board DC to DC converter. Modern micro processors
combined with DDR memory, need high-speed bandwidth
data bus which requires a particular bus termination volt-
age. This voltage will be tightly regulated to track the
half of chipset voltage for best performance. The IRU3138
together with two N-channel MOSFETs, provide a low
cost solution for such applications. This device features
a programmable frequency set from 200KHz to 400KHz,
under-voltage lockout for both Vcc and Vc supplies, an
external programmable soft-start function as well as
output under-voltage detection that latches off the de-
vice when an output short is detected.
TYPICAL APPLICATION
VDDQ
(2.5V)
DDR
Memory
C1
0.1uF
R1
1K
R2
1K C5
0.1uF
C7
3300pF
R3
13K
Vcc
VR E F
VP
Vc
HDrv
SS/SD U1
IRU3138
Rt
Comp
LDrv
PGnd
Gnd
Fb
12V
C2
1uF
L1
C3
2x 47uF
1uH
D1
BAT54
Q1
IRF7460
Q2
IRF7456
L2
3.3uH
5V
C4
47uF
Vtt
1.25V @ 10A
C6
2x 150uF
40m V
Figure 1 - Typical application of IRU3138 when VTT tracks the VDDQ.
PACKAGE ORDER INFORMATION
TA (°C)
0 To 70
DEVICE
IRU3138CS
PACKAGE
14-Pin Plastic SOIC NB (S)
Rev. 1.0
01/29/04
www.irf.com
1
1 page  
IRU3138
THEORY OF OPERATION
Introduction
The IRU3138 is a fixed frequency, voltage mode syn-
chronous controller and consists of a precision refer-
ence voltage, an error amplifier, an internal oscillator, a
PWM comparator, 1A peak gate driver, soft-start and
shutdown circuits (see Block Diagram). The output volt-
age of the synchronous converter is set and controlled
by the output of the error amplifier; this is the amplified
error signal from the sensed output voltage and the refer-
ence voltage. This voltage is compared to a fixed fre-
quency linear sawtooth ramp and generates fixed fre-
www.DataSheet4U.comquency pulses of variable duty-cycle, which drives the
two N-channel external MOSFETs.The timing of the IC
is provided through an internal oscillator circuit which
uses on-chip capacitor. The oscillation frequency is pro-
grammable between 200KHz to 400KHz by using an
external resistor. Figure 4A shows switching frequency
vs. external resistor.
The magnitude of this current is inversely proportional to
the voltage at soft-start pin.
The 20mA current source starts to charge up the exter-
nal capacitor. In the mean time, the soft-start voltage
ramps up, the current flowing into Fb pin starts to de-
crease linearly and so does the voltage at the positive
pin of feedback UVLO comparator and the voltage nega-
tive input of E/A.
When the soft-start capacitor is around 1V, the current
flowing into the Fb pin is approximately 32mA. The volt-
age at the positive input of the E/A is approximately:
32mA325K = 0.8V
The E/A will start to operate and the output voltage starts
to increase. As the soft-start capacitor voltage contin-
ues to go up, the current flowing into the Fb pin will keep
decreasing. Because the voltage at pin of E/A is regu-
lated to reference voltage 0.8V, the voltage at the Fb is:
Soft-Start
The IRU3138 has a programmable soft-start to control
the output voltage rise and limit the current surge at the
start-up. To ensure correct start-up, the soft-start se-
quence initiates when the Vc and Vcc rise above their
threshold (3.5V and 4.25V respectively) and generates
the Power On Reset (POR) signal. Soft-start function
operates by sourcing an internal current to charge an
external capacitor to about 3V. Initially, the soft-start func-
tion clamps the E/A’s output of the PWM converter and
disables the short circuit protection. During the power
up, the output starts at zero and voltage at Fb is below
0.4V. The feedback UVLO is disabled during this time
by injecting a current (64mA) into the Fb. This generates
a voltage about 1.6V (64mA325K) across the negative
input of E/A and positive input of the feedback UVLO
comparator (see Fig3).
20uA
3V
SS/SD
64uA
Max
HDrv
POR
Comp
0.8V
Fb
25K
25K
Error Amp
LDrv
0.4V
64uA325K=1.6V
When SS=0
Feeback
POR
UVLO Comp
Figure 3 - Soft-start circuit for IRU3138.
VFB = 0.8-25K3(Injected Current)
The feedback voltage increases linearly as the injecting
current goes down. The injecting current drops to zero
when soft-start voltage is around 2V and the output volt-
age goes into steady state.
As shown in Figure 4, the positive pin of feedback UVLO
comparator is always higher than 0.4V, therefore, feed-
back UVLO is not functional during soft-start.
Output of UVLO
POR
Soft-Start 0V
Voltage
64uA
Current flowing
into Fb pin
Voltage at negative input ≅1.6V
of Error Amp and Feedback
UVLO comparator
3V
≅2V
≅1V
0uA
0.8V
0.8V
0V
Voltage at Fb pin
Figure 4 - Theoretical operational waveforms
during soft-start.
Rev. 1.0
01/29/04
www.irf.com
5
5 Page 
IRU3138
For a general solution for unconditionally stability for
ceramic capacitor with very low ESR and any type of
output capacitors, in a wide range of ESR values we
should implement local feedback with a compensation
network. The typically used compensation network for
voltage-mode controller is shown in Figure 10.
www.DataSheet4U.com
ZIN VOUT
C10
R8
R6
C12
R7 C11
Zf
Gain(dB)
Fb
R5
Vp=VREF
E/A
Ve
Comp
H(s) dB
FP1 = 0
FP2 =
1
2p3R83C10
( )FP3 =
1
2p3R73
C123C11
C12+C11
≅
1
2p3R73C12
FZ1 =
1
2p3R73C11
11
FZ2 = 2p3C103(R6 + R8) ≅ 2p3C103R6
Cross Over Frequency:
FO
=
R73C103
VIN
VOSC
3
1
2p3Lo3Co
Where:
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Lo = Output Inductor
Co = Total Output Capacitors
---(21)
FZ1 FZ2
FP2
FP3 Frequency
Figure 10 - Compensation network with local
feedback and its asymptotic gain plot.
The stability requirement will be satisfied by placing the
poles and zeros of the compensation network according
to following design rules. The consideration has been
taken to satisfy condition (20) regarding transconduc-
tance error amplifier.
In such configuration, the transfer function is given by:
Ve
VOUT
=
1 - gmZf
1 + gmZIN
The error amplifier gain is independent of the transcon-
ductance under the following condition:
gmZf >> 1 and gmZIN >>1
---(20)
These design rules will give a crossover frequency ap-
proximately one-tenth of the switching frequency. The
higher the band width, the potentially faster the load tran-
sient speed. The gain margin will be large enough to
provide high DC-regulation accuracy (typically -5dB to -
12dB). The phase margin should be greater than 458 for
overall stability.
By replacing ZIN and Zf according to Figure 7, the trans-
former function can be expressed as:
[ ( )]H(s)
=
13
sR6(C12+C11)
(1+sR7C11)3[1+sC10(R6+R8)]
C12C11
1+sR7 C12+C11 3(1+sR8C10)
As known, transconductance amplifier has high imped-
ance (current source) output, therefore, consider should
be taken when loading the E/A output. It may exceed its
source/sink output current capability, so that the ampli-
fier will not be able to swing its output voltage over the
necessary range.
The compensation network has three poles and two ze-
ros and they are expressed as follows:
Based on the frequency of the zero generated by ESR
versus crossover frequency, the compensation type can
be different. The table below shows the compensation
type and location of crossover frequency.
Compensator Location of Zero
Type
Crossover Frequency
(FO)
Type II (PI)
FPO < FZO < FO < fS/2
Type III (PID)
Method A
Type III (PID)
Method B
FPO < FO < FZO < fS/2
FPO < FO < fS/2 < FZO
Typical
Output
Capacitor
Electrolytic,
Tantalum
Tantalum,
Ceramic
Ceramic
Table - The compensation type and location of zero
crossover frequency.
Detail information is dicussed in application Note AN-
1043 which can be downloaded from the IR Web-Site.
Rev. 1.0
01/29/04
www.irf.com
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet IRU3138.PDF ] | |
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