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PDF SG1843L Data sheet ( Hoja de datos )
| Número de pieza | SG1843L | |
| Descripción | CURRENT MODE PWM CONTROLLER | |
| Fabricantes | Microsemi Corporation | |
| Logotipo |  |
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THE IN F I N I T E P O W E R OF IN N O VAT I O N
L I N D O C # : 1842
SG1842/SG1843 Series
CURRENT MODE PWM CONTROLLER
PRODUCTION DATA SHEET
DESCRIPTION
The SG1842/43 family of control IC's
provides all the necessary features to
implement off-line fixed frequency,
current-mode switching power supplies
with a minimum number of external
components. Current-mode
architecture demonstrates improved
line regulation, improved load
regulation, pulse-by-pulse current
limiting and inherent protection of the
power supply output switch.
The bandgap reference is trimmed to
±1% over temperature. Oscillator
discharge current is trimmed to less
than ±10%. The SG1842/43 has under-
voltage lockout, current limiting
circuitry and start-up current of less
than 1mA.
The totem-pole output is optimized
to drive the gate of a power MOSFET.
The output is low in the off state to
provide direct interface to an N
channel device.
The SG1842/43 is specified for
operation over the full military ambient
temperature range of -55°C to 125°C.
The SG2842/43 is specified for the
industrial range of -25°C to 85°C, and
the SG3842/43 is designed for the
commercial range of 0°C to 70°C.
PRODUCT HIGHLIGHT
TYPICAL APPLICATION OF SG3842 IN A FLYBACK CONVERTER
AC
INPUT
RST
IST
VCC
SG3842
KEY FEATURES
s OPTIMIZED FOR OFF-LINE CONTROL
s LOW START-UP CURRENT (<1mA)
s AUTOMATIC FEED FORWARD
COMPENSATION
s TRIMMED OSCILLATOR DISCHARGE
CURRENT
s PULSE-BY-PULSE CURRENT LIMITING
s ENHANCED LOAD RESPONSE
CHARACTERISTICS
s UNDER-VOLTAGE LOCKOUT WITH 6V
HYSTERESIS (SG1842 only)
s DOUBLE-PULSE SUPPRESSION
s HIGH-CURRENT TOTEM-POLE OUTPUT
(1AMP PEAK)
s INTERNALLY TRIMMED BANDGAP
REFERENCE
s 500KHZ OPERATION
s UNDERVOLTAGE LOCKOUT
SG1842 - 16 volts
SG1843 - 8.4 volts
s LOW SHOOT-THROUGH CURRENT <75mA
OVER TEMPERATURE
HIGH RELIABILITY FEATURES
s AVAILABLE TO MIL-STD-883B AND DESC
SMD
s SCHEDULED FOR MIL-M38510 QPL LISTING
s RADIATION DATA AVAILABLE
s LINFINITY LEVEL "S" PROCESSING AVAILABLE
TA (°C)
M
Plastic DIP
8-pin
0 to 70
SG3842M
SG3843M
-25 to 85
SG2842M
SG2843M
-55 to 125
—
—
MIL-STD/883
—
—
DESC
—
PACKAGE ORDER INFORMATION
N
Plastic DIP
14-pin
DM
Plastic
8-pin
SOIC
D
Plastic SOIC
14-pin
Y
Ceramic DIP
8-pin
J
Ceramic DIP
14-pin
F
Cer. Flatpack
10-pin
L
Ceramic LCC
20-pin
SG3842N
SG3842DM
SG3842D
SG3842Y
SG3842J
—
—
SG3843N
SG3843DM
SG3843D
SG3843Y
SG3843J
—
—
SG2842N
SG2842DM
SG2842D
SG2842Y
SG2842J
—
—
SG2843N
SG2843DM
SG2843D
SG2843Y
SG2843J
—
—
——
—
SG1842Y
SG1842J
— SG1842L
——
—
SG1843Y
SG1843J
— SG1843L
——
— SG1842Y/883B SG1842J/883B
— SG1842L/883B
——
— SG1843Y/883B SG1843J/883B
— SG1843L/883B
——
— SG1842Y/DESC SG1842J/DESC SG1842F/DESC SG1842L/DESC
— — SG1843Y/DESC SG1843J/DESC SG1843F/DESC SG1843L/DESC
Note: All surface-mount packages are available in Tape & Reel.
Copyright © 2000
Rev. 1.6 4/00
FOR FURTHER INFORMATION CALL (714) 898-8121
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841
1
1 page  
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
PRODUCTION DATA SHEET
VCC*
GROUND**
RT/CT
BLOCK DIAGRAM
34V
16V (1842)
8.4V (1843)
2.5V
UVLO
6V (1842)
0.8V (1843)
S/R
5V
REF
OSCILLATOR
VREF
GOOD LOGIC
INTERNAL
BIAS
VFB
COMP
CURRENT SENSE
ERROR AMP
2R S
1V
R
R PWM
LATCH
CURRENT SENSE
COMPARATOR
*-
V and V are internally connected for 8 pin packages.
CC C
** - POWER GROUND and GROUND are internally connected for 8 pin packages.
VREF
5.0V
50mA
VC*
OUTPUT
POWER GROUND**
Copyright © 2000
Rev. 1.6 4/00
5
5 Page 
PRODUCT DATABOOK 1996/1997
SG1842/SG1843 Series
CURRENT-MODE PWM CONTROLLER
PRODUCTION DATA SHEET
TYPICAL APPLICATION CIRCUITS
Pin numbers referenced are for 8-pin package and pin numbers in parenthesis are for 14-pin package.
VCC VIN
VIN VCC
7 (12)
7 (12)
7 (11)
Q1
6 (10)
SG1842/43
5 (8)
R
3 (5)
C
RS
IPK
IPK(MAX)
=
1.0V
RS
SG1842/43
7 (11)
6 (10)
R1
Q1
5 (8)
3 (5)
RS
FIGURE 15. — CURRENT-SENSE SPIKE SUPPRESSION
The RC low pass filter will eliminate the leading edge current spike
caused by parasitics of Power MOSFET.
IB
VC +
» R2
VC1
» R1||R2 _
VC
SG1842/43
7 (11)
R2
6 (10)
VC1
C1
R1
5 (8)
3 (5)
VIN
Q1
RS
FIGURE 17. — BIPOLAR TRANSISTOR DRIVE
The 1842/43 output stage can provide negative base current to
remove base charge of power transistor (Q1) for faster turn off. This
is accomplished by adding a capacitor (C1) in parallel with a resistor
(R1). The resistor (R1) is to limit the base current during turn on.
FIGURE 16. — MOSFET PARASITIC OSCILLATIONS
A resistor (R1) in series with the MOSFET gate reduce overshoot and
ringing caused by the MOSFET input capacitance and any induc-
tance in series with the gate drive. (Note: It is very important to
have a low inductance ground path to insure correct operation of
the I.C. This can be done by making the ground paths as short and
as wide as possible.)
VCC
7 (12)
Isolation
Boundary
7 (11)
6 (10)
SG1842/43
5 (8)
3 (5)
R
C
RS
VIN
Q1
Waveforms
+
0_
50% DC
+
0_
NS NP 25% DC
V (PIN 1) - 1.4
IPK =
3RS
NP
NS
FIGURE 18. — ISOLATED MOSFET DRIVE
Current transformers can be used where isolation is required
between PWM and Primary ground. A drive transformer is then
necessary to interface the PWM output with the MOSFET.
Copyright © 2000
Rev. 1.6 4/00
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet SG1843L.PDF ] | |
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