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PDF MAX5885 Data sheet ( Hoja de datos )
| Número de pieza | MAX5885 | |
| Descripción | 3.3V / 16-Bit / 200Msps High Dynamic Performance DAC with CMOS Inputs | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-2786; Rev 1; 12/03
3.3V, 16-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
General Description
The MAX5885 is an advanced, 16-bit, 200Msps digital-
to-analog converter (DAC) designed to meet the
demanding performance requirements of signal synthe-
sis applications found in wireless base stations and
other communications applications. Operating from a
single 3.3V supply, this DAC offers exceptional dyna-
mic performance such as 77dBc spurious-free dynamic
range (SFDR) at fOUT = 10MHz. The DAC supports
update rates of 200Msps at a power dissipation of less
than 200mW.
The MAX5885 utilizes a current-steering architecture,
which supports a full-scale output current range of 2mA
to 20mA, and allows a differential output voltage swing
between 0.1VP-P and 1VP-P.
The MAX5885 features an integrated 1.2V bandgap
reference and control amplifier to ensure high accuracy
and low noise performance. Additionally, a separate
reference input pin enables the user to apply an exter-
nal reference source for optimum flexibility and to
improve gain accuracy.
The digital and clock inputs of the MAX5885 are
designed for CMOS-compatible voltage levels. The
MAX5885 is available in a 48-pin QFN package with an
exposed paddle (EP) and is specified for the extended
industrial temperature range (-40°C to +85°C).
Refer to the MAX5883 and MAX5884 data sheets for
pin-compatible 12- and 14-bit versions of the MAX5885.
For LVDS high-speed versions, refer to the MAX5886/
MAX5887/MAX5888 data sheet.
Features
♦ 200Msps Output Update Rate
♦ Single 3.3V Supply Operation
♦ Excellent SFDR and IMD Performance
SFDR = 77dBc at fOUT = 10MHz (to Nyquist)
IMD = -88dBc at fOUT = 10MHz
ACLR = 74dB at fOUT = 30.72MHz
♦ 2mA to 20mA Full-Scale Output Current
♦ CMOS-Compatible Digital and Clock Inputs
♦ On-Chip 1.2V Bandgap Reference
♦ Low Power Dissipation
♦ 48-Pin QFN-EP Package
Ordering Information
PART
TEMP RANGE
MAX5885EGM
-40°C to +85°C
*EP = Exposed paddle.
PIN-PACKAGE
48 QFN-EP*
TOP VIEW
Pin Configuration
Applications
Base Stations: Single/Multicarrier UMTS,
CDMA, GSM
Communications: LMDS, MMDS, Point-to-Point
Microwave
Digital Signal Synthesis
Automated Test Equipment (ATE)
Instrumentation
B1
B0
XOR
VCLK
CLKGND
CLKP
CLKN
CLKGND
VCLK
PD
AVDD
AGND
1
2
3
4
5
6
7
8
9
10
11
12
MAX5885
36 B12
35 B13
34 B14
33 B15
32 DGND
31 DVDD
30 SEL0
29 N.C.
28 N.C.
27 N.C.
26 N.C.
25 N.C.
QFN
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
3.3V, 16-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
Typical Operating Characteristics
(AVDD = DVDD = VCLK = 3.3V, external reference, VREFIO = 1.25V, RL = 50Ω, IOUT = 20mA, TA = +25°C, unless otherwise noted.)
SPURIOUS-FREE DYNAMIC RANGE
vs. OUTPUT FREQUENCY (fCLK = 50MHz)
100
90 -12dB FS
80
70
60
-6dB FS
0dB FS
50
40
30
20
10
0
0 5 10 15 20 25
fOUT (MHz)
SPURIOUS-FREE DYNAMIC RANGE
vs. OUTPUT FREQUENCY (fCLK = 100MHz)
100
90
-6dB FS
80
70
60
0dB FS
50 -12dB FS
40
30
20
10
0
0 10 20 30 40 50
fOUT (MHz)
SPURIOUS-FREE DYNAMIC RANGE
vs. OUTPUT FREQUENCY (fCLK = 150MHz)
100
90 -12dB FS
80
70
60
-6dB FS
50 0dB FS
40
30
20
10
0
0 15 30 45 60 75
fOUT (MHz)
SPURIOUS-FREE DYNAMIC RANGE
vs. OUTPUT FREQUENCY (fCLK = 200MHz)
100
90
-12dB FS
80
70
60 -6dB FS
50 0dB FS
40
30
20
10
0
0 10 20 30 40 50 60 70 80 90 100
fOUT (MHz)
TWO-TONE IMD vs. OUTPUT FREQUENCY
(1MHz CARRIER SPACING, fCLK = 100MHz)
-100
-90 -12dB FS
-80
-70
-6dB FS
-60
-50
-40
0
10 20 30 40 50
fOUT (MHz)
TWO-TONE INTERMODULATION DISTORTION
(fCLK = 100MHz)
0
-10
AOUT = -6dB FS
BW = 12MHz
fT1 = 28.9429MHz
fT2 = 29.8706MHz
-20
-30 fT1 fT2
-40
-50
-60
-70 2 x fT1 - fT2 2 x fT2 - fT1
-80
-90
-100
24 25 26 27 28 29 30 31 32 33 34 35 36
fOUT (MHz)
TWO-TONE IMD vs. OUTPUT FREQUENCY
(1MHz CARRIER SPACING, fCLK = 200MHz)
-100
-90
-12dB FS
-80
-70
-60 -6dB FS
-50
-40
0
10 20 30 40 50 60 70 80
fOUT (MHz)
SFDR vs. OUTPUT FREQUENCY
(fCLK = 200MHz, AOUT = -6dB FS)
100
IOUT = 20mA
80
60
IOUT = 5mA IOUT = 10mA
40
20
0
0 10 20 30 40 50 60 70 80 90 100
fOUT (MHz)
SFDR vs. fOUT AND TEMPERATURE
(fCLK = 200MHz, AOUT = -6dB FS, IFS = 20mA)
100
90 TA = -40°C
80
70
60
50
TA = +85°C
TA = +25°C
40
30
20
10
0
0 10 20 30 40 50 60 70 80 90 100
fOUT (MHz)
_______________________________________________________________________________________ 5
5 Page 
3.3V, 16-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
B0 TO B15
DIGITAL DATA IS LATCHED ON OUTPUT DATA IS UPDATED ON
THE RISING EDGE OF CLKP
THE FALLING EDGE OF CLKP
N-1 N
N+1 N+2
tSETUP
tHOLD
tCH tCL
CLKP
CLKN
tPD
IOUT N - 5
N-4
N-3
N-2 N-1
Figure 5. Detailed Timing Relationship
Power-Down Operation (PD)
The MAX5885 also features an active-high power-down
mode, which allows the user to cut the DAC’s current
consumption. A single pin (PD) is used to control the
power-down mode (PD = 1) or reactivate the DAC (PD
= 0) after power-down. Enabling the power-down mode
of this 16-bit CMOS DAC allows the overall power con-
sumption to be reduced to less than 1mW. The
MAX5885 requires 10ms to wake up from power-down
and enter a fully operational state.
Applications Information
Differential Coupling Using a
Wideband RF Transformer
The differential voltage existing between IOUTP and
IOUTN can also be converted to a single-ended volt-
age using a transformer (Figure 6) or a differential
amplifier configuration. Using a differential transformer-
coupled output, in which the output power is limited to
0dBm, can optimize the dynamic performance.
However, make sure to pay close attention to the trans-
former core saturation characteristics when selecting a
transformer for the MAX5885. Transformer core satura-
tion can introduce strong 2nd-harmonic distortion,
especially at low output frequencies and high signal
amplitudes. It is also recommended to center tap the
transformer to ground. If no transformer is used, each
DAC output should be terminated to ground with a 50Ω
resistor. Additionally, a 100Ω resistor should be placed
between the outputs (Figure 7).
If a single-ended unipolar output is desirable, IOUTP
should be selected as the output, with IOUTN ground-
ed. However, driving the MAX5885 single ended is not
recommended since additional noise is added (from
the ground plane) in such configurations.
The distortion performance of the DAC depends on the
load impedance. The MAX5885 is optimized for a 50Ω
double termination. It can be used with a transformer
output as shown in Figure 7 or just one 50Ω resistor
from each output to ground and one 50Ω resistor
between the outputs. This produces a full-scale output
power of up to 0dBm depending on the output current
setting. Higher termination impedance can be used at
the cost of degraded distortion performance and
increased output noise voltage.
Adjacent Channel Leakage Power Ratio
(ACLR) Testing for CDMA- and
W-CDMA-Based Base Station
Transceiver Systems (BTS)
The transmitter sections of BTS applications serving
CDMA and W-CDMA architectures must generate carri-
ers with minimal coupling of carrier energy into the adja-
cent channels. Similar to the GSM/EDGE model (see the
Multitone Testing for GSM/EDGE Applications section), a
transmit mask (Tx mask) exists for this application. The
spread-spectrum modulation function applied to the carri-
er frequency generates a spectral response, which is uni-
form over a given bandwidth (up to 4MHz) for a W-CDMA-
modulated carrier.
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet MAX5885.PDF ] | |
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