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PDF SL34119D Data sheet ( Hoja de datos )

Número de pieza SL34119D
Descripción Low Power Audio Amplifier
Fabricantes System Logic Semiconductor　
Logotipo System Logic Semiconductor Logotipo



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SL34119
Low Power Audio Amplifier
The SL34119 is a low power audio amplifier integrated circuit intended
(primarily) for telephone applications, such as in speakerphones. It
provides differential speaker outputs to maximize output swing at low
supply voltages (2.0 volts minimum). Coupling capacitors to the
speaker are not required. Open loop gain is 80 dB, and the closed loop
gain is set with two external resistors. A Chip Disable pin permits
powering down and/or muting the input signal. The SL34119 is
available in a standard 8 pin DIP or a surface mount package.
• Wide Operating Supply Voltage Range (2-16 Volts) - Allows
Telephone Line Powered Applications
• Low Quiescent Supply Current for Battery Powered Applications
• Chip Disable Input to Power Down the IC
• Low Power Down Quiescent Current
• Drives a Wide Range of Speaker Loads (8-100Ω)
• Output Power Exceeds 250 mW with 32Ω Speaker
• Low Total Harmonic Distortion
• Gain Adjustable from <0 dB to >46 dB for Voice Band
• Requires Few External Components
ORDERING INFORMATION
SL34119N Plastic
SL34119D SOIC
TA = -10° to 70° C for
all packages
PIN ASSIGNMENT
SIMPLIFIED BLOCK DIAGRAM
* = Optional
Differential Gain = 2 x Rf
Ri
SLS
System Logic
Semiconductor

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SL34119D pdf
SL34119
ELECTRICAL CHARACTERISTICS(TA = -10 to +70°C, VCD = 0 V)
Symbol
Parameter
Test Conditions
AMPLIFIERS (AC CHARACTERISTICS)
ri
AVOL1
AC Input Resistance (VIN)
Open Loop Gain (Amplifier #1)
AV2
GBW
POUT3
POUT12
Closed Loop Gain (Amplifier
#2)
Gain Bandwidth Product
Output Power
THD Total Harmonic Distortion
PSRR Power Supply Rejection
GMT Muting
POWER SUPPLY
ICC1 Maximum Power Supply
ICC2 Current
* @25°C
f = 100 Hz, VCC = 6.0 V,
VFC2 = 2.65 V
f = 1.0 KHz, VCC = 6.0 V,
RL=32 Ω
VCC = 3.0 V, RL = 16 Ω,
THD ≤ 10%, VFC2 = 1.15 V
VCC = 12.0 V, RL = 100 Ω,
THD ≤ 10%, VFC2=12 V
VCC = 6.0 V, RL = 32 Ω,
f = 1.0 KHz, POUT = 125 mW
VCC = 6.0 V, ∆VCC = 3.0 V,
C1 =∞, C2 = 0.01 µF
VCC = 6.0 V, f = 1.0 kHz,
CD = 2.0 V
VCC =3.0 V, RL =∞,CD=0.8V
VCC =3.0 V, RL =∞,CD=2.0V
Guaranteed
Limits
Min Max
Unit
22.5 - MΩ
60 - dB
-0.35 +0.35 dB
1.125 - MHz
55 - mW
400* -
- 5.0 %
35 - dB
50 - dB
- 5.0 mA
- 125 µA
Figure 1. POWER SUPPLY CURRENT
Figure 2. DEVICE DISSIPATION
8.0 Ω LOAD
SLS
System Logic
Semiconductor

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