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ZL50130 Ethernet Pseudo-Wires across a PSN Data Sheet Applications • Ethernet Pseudo-Wires across a Packet Switch Network Ordering Information ZL50130 PBGA -40°C to +85 °C System Interfaces • • • Flexible 32-bit host CPU interface (Motorola PowerQUICC™ II compatible) Dual address DMA tra
ZL50115/16/17/18/19/20 32, 64 and 128 Channel CESoP Processors Data Sheet Features General • • • • • Circuit Emulation Services over Packet (CESoP) transport for MPLS, IP and Ethernet networks On chip timing & synchronization recovery across a packet network On chip du
ZL50115/16/17/18/19/20 32, 64 and 128 Channel CESoP Processors Data Sheet Features General • • • • • Circuit Emulation Services over Packet (CESoP) transport for MPLS, IP and Ethernet networks On chip timing & synchronization recovery across a packet network On chip dual reference Stratum
ZL50115/16/17/18/19/20 32, 64 and 128 Channel CESoP Processors Data Sheet Features General • • • • • Circuit Emulation Services over Packet (CESoP) transport for MPLS, IP and Ethernet networks On chip timing & synchronization recovery across a packet network On chip du
ZL50115/16/17/18/19/20 32, 64 and 128 Channel CESoP Processors Data Sheet Features General • • • • • Circuit Emulation Services over Packet (CESoP) transport for MPLS, IP and Ethernet networks On chip timing & synchronization recovery across a packet network On chip du
ZL50115/16/17/18/19/20 32, 64 and 128 Channel CESoP Processors Data Sheet Features General • • • • • Circuit Emulation Services over Packet (CESoP) transport for MPLS, IP and Ethernet networks On chip timing & synchronization recovery across a packet network On chip du
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