XC9572-15PQ100C
Xilinx
XC9572 In-System Programmable CPLD1
®
XC9572 In-System Programmable CPLD
1 1*
December 4, 1998 (Version 3.0)
Product Specification
Features
• • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 72 macrocells with 1,600 usable gates Up to 72 user I/O pins 5 V in-s
XC9572-15PQ100I
XC9572 In-System Programmable CPLD1
®
XC9572 In-System Programmable CPLD
1 1*
December 4, 1998 (Version 3.0)
Product Specification
Features
• • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 72 macrocells with 1,600 usable gates Up to 72 user I/O pins 5 V in-system programmable (ISP) - Endurance of
Xilinx
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