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XC95108 전자부품 데이터시트



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XC95108  

Xilinx
Xilinx

XC95108

XC95108 In-System Programmable CPLD

1 ® XC95108 In-System Programmable CPLD 1 1* December 4, 1998 (Version 3.0) Product Specification Features • • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 108 macrocells with 2400 usable gates Up to 108 user I/O pins 5 V in



XC95108-10PC84C  

Xilinx
Xilinx

XC95108-10PC84C

XC95108 In-System Programmable CPLD

1 ® XC95108 In-System Programmable CPLD 1 1* December 4, 1998 (Version 3.0) Product Specification Features • • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 108 macrocells with 2400 usable gates Up to 108 user I/O pins 5 V in



XC95108-10PC84I  

Xilinx
Xilinx

XC95108-10PC84I

XC95108 In-System Programmable CPLD

1 ® XC95108 In-System Programmable CPLD 1 1* December 4, 1998 (Version 3.0) Product Specification Features • • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 108 macrocells with 2400 usable gates Up to 108 user I/O pins 5 V in



XC95108-10PQ100C  

Xilinx
Xilinx

XC95108-10PQ100C

XC95108 In-System Programmable CPLD

1 ® XC95108 In-System Programmable CPLD 1 1* December 4, 1998 (Version 3.0) Product Specification Features • • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 108 macrocells with 2400 usable gates Up to 108 user I/O pins 5 V in



XC95108-10PQ100I  

Xilinx
Xilinx

XC95108-10PQ100I

XC95108 In-System Programmable CPLD

1 ® XC95108 In-System Programmable CPLD 1 1* December 4, 1998 (Version 3.0) Product Specification Features • • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 108 macrocells with 2400 usable gates Up to 108 user I/O pins 5 V in



XC95108-10PQ160C  

Xilinx
Xilinx

XC95108-10PQ160C

XC95108 In-System Programmable CPLD

1 ® XC95108 In-System Programmable CPLD 1 1* December 4, 1998 (Version 3.0) Product Specification Features • • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 108 macrocells with 2400 usable gates Up to 108 user I/O pins 5 V in



XC95108-10PQ160I  

Xilinx
Xilinx

XC95108-10PQ160I

XC95108 In-System Programmable CPLD

1 ® XC95108 In-System Programmable CPLD 1 1* December 4, 1998 (Version 3.0) Product Specification Features • • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 108 macrocells with 2400 usable gates Up to 108 user I/O pins 5 V in



XC95108-10TQ100C  

Xilinx
Xilinx

XC95108-10TQ100C

XC95108 In-System Programmable CPLD

1 ® XC95108 In-System Programmable CPLD 1 1* December 4, 1998 (Version 3.0) Product Specification Features • • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 108 macrocells with 2400 usable gates Up to 108 user I/O pins 5 V in



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