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PLL103-04 전자부품 데이터시트



PLL103-04 전자부품 회로 및
기능 검색 결과



PLL103-04  

PhaseLink Corporation
PhaseLink Corporation

PLL103-04

1-to-4 Clock Distribution Buffer

Preliminary PLL103-04 1-to-4 Clock Distribution Buffer FEATURES 4 outputs identical to FIN. Low skew (< 250 ps between outputs). Input / Output frequency range 0 – 160 MHz 25mA drive capability at TTL levels. 70mA drive capability at CMOS levels. Output en




관련 부품 PLL103- 상세설명

PLL103-53  

  
DDR SDRAM Buffer

Preliminary PLL103-53 DDR SDRAM Buffer with 5 DDR or 3 SDR/3 DDR DIMMS FEATURES Generates 30-output buffers from one input. Supports up to 4 DDR DIMMS or 3 SDR DIMMS and 2 DDR DIMMS. • Supports 266MHz DDR SDRAM. • One additional output for feedback. • Less than 5ns delay. • Skew between an



PhaseLink Corporation
PhaseLink Corporation

PDF



PLL103-11  

  
Low Skew Buffers

PLL103-11 Low Skew Buffers FEATURES Generates 13 copies of High-speed clock inputs. Supports up to three SDRAM DIMMS synchronous clocks. • Supports 2-wire I2C serial bus interface with readback. • 50% duty cycle with low jitter. • Less than 5ns delay. • Skew between any o



PhaseLink Corporation
PhaseLink Corporation

PDF



PLL103-07  

  
2 DIMM DDR Fanout Buffer

Preliminary PLL103-07 2 DIMM DDR Fanout Buffer FEATURES • Generates 12-output buffers from one input. • Supports VIA Pro266 DDR chipset. • Supports up to 2 DDR DIMMS. • Supports up to 400MHz DDR, SDRAMS. • One additional output for feedback. • 6 differential clock distribution. • Les



PhaseLink Corporation
PhaseLink Corporation

PDF



PLL103-06  

  
DDR SDRAM Buffer

Preliminary PLL103-06 DDR SDRAM Buffer with 2 DDR or 3 SDRAM DIMMS FEATURES Generates 12-output buffers from one input. Supports up to 2 DDR DIMMS or 3 SDRAM DIMMS. • Supports 266MHz DDR SDRAM. • One additional output for feedback. • Less than 5ns delay. • Skew between any outputs is less



PhaseLink Corporation
PhaseLink Corporation

PDF



PLL103-05  

  
1-to-5 Clock Distribution Buffer

Preliminary PLL103-05 1-to-5 Clock Distribution Buffer FEATURES • • • • • • • 5 outputs identical to FIN. Low skew (< 250 ps between outputs). Input / Output frequency range 0 – 160 MHz 25mA drive capability at TTL levels. 70mA drive capability at CMOS levels. 3.3V operation. Avail



PhaseLink Corporation
PhaseLink Corporation

PDF



PLL103-03  

  
DDR SDRAM Buffer

Preliminary PLL103-03 DDR SDRAM Buffer with 4 DDR or 3 SDR/2 DDR DIMMS FEATURES Generates 24-output buffers from one input. Supports up to 4 DDR DIMMS or 3 SDR DIMMS and 2 DDR DIMMS. • Supports 266MHz DDR SDRAM. • One additional output for feedback. • Less than 5ns delay. • Skew between an



PhaseLink Corporation
PhaseLink Corporation

PDF




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