NB3L03 전자부품 데이터시트

NB3L8543S 2.5 V/3.3 V Differential 2:1 MUX to 4 LVDS Clock Fanout Buffer Outputs with Clock Enable and Clock Select Description The NB3L8543S is a high performance, low skew 1−to−4 LVDS Clock Fanout Buffer. The NB3L8543S features a multiplexed input which can be driven by either a differential

NB3L8533 2.5V/3.3V Differential 2:1 MUX to 4 LVPECL Fanout Buffer Description The NB3L8533 is a low skew 1:4 LVPECL Clock fanout buffer designed explicitly for low output skew applications. The NB3L8533 features a multiplexed input which can be driven by either a differential or single−ended inpu

NB3L8504S 2.5 V / 3.3 V 1:4 Differential Input to LVDS Fanout Buffer / Translator Description The NB3L8504S is a differential 1:4 LVDS fanout buffer/translator with OE control for each differential output. The differential inputs which can be driven by either a differential or single−ended input,

NB3L553 2.5 V / 3.3 V / 5.0 V 1:4 Clock Fanout Buffer Description The NB3L553 is a low skew 1−to 4 clock fanout buffer, designed for clock distribution in mind. The NB3L553 specifically guarantees low output−to−output skew. Optimal design, layout and processing minimize skew within a device an

NB3L208K 2.5V, 3.3V Differential 1:8 HCSL Fanout Buffer Description The NB3L208K is a differential 1:8 Clock fanout buffer with High−speed Current Steering Logic (HCSL) outputs. Inputs can directly accept differential LVPECL, LVDS, and HCSL signals. Single−ended LVPECL, HCSL, LVCMOS, or LVTTL l

NB3L202K 2.5 V, 3.3 V Differential 1:2 HCSL Fanout Buffer Description The NB3L202K is a differential 1:2 Clock fanout buffer with High−speed Current Steering Logic (HCSL) outputs. Inputs can directly accept differential LVPECL, LVDS, and HCSL signals. Single−ended LVPECL, HCSL, LVCMOS, or LVTTL