M5M4V64S30ATP-8
Mitsubishi
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAMSDRAM (Rev.0.2) Jan'97 Preliminary
MITSUBISHI LSIs
M5M4V64S30ATP-8, -10, -12
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
PRELIMINARY
Some of contents are subject to change without notice.
DESCRIPTION
The M5M4V64S30ATP is a 4-bank x 2097152-word x
M5M4V64S30ATP-8A
Mitsubishi
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAMMITSUBISHI LSIs SDRAM (Rev.1.3) Mar'98
M5M4V64S30ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
Some of contents are subject to change without notice. PIN CONFIGURATION (TOP VIEW)
Vdd DQ0 VddQ NC DQ1 VssQ NC DQ2 VddQ NC DQ3 Vss
M5M4V64S30ATP-8L
Mitsubishi
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAMMITSUBISHI LSIs SDRAM (Rev.1.3) Mar'98
M5M4V64S30ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
Some of contents are subject to change without notice. PIN CONFIGURATION (TOP VIEW)
Vdd DQ0 VddQ NC DQ1 VssQ NC DQ2 VddQ NC DQ3 Vss