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M48Z35 M48Z35Y 256 Kbit (32 Kbit x 8) ZEROPOWER® SRAM Features ■ Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages: (VPFD = power-fail desele
M48Z35AY M48Z35AV 256 Kbit (32Kb x8) ZEROPOWER® SRAM s INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY READ CYCLE TIME EQUALS WRITE CYCLE TIME BATTERY LOW FLAG (BOK) AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION WRITE PROTECT VOLTAGES (VPFD = Power-fail Deselect V
M48Z35AV 5.0 V or 3.3 V, 256 Kbit (32 Kbit x 8) ZEROPOWER® SRAM Not recommended for new design Features ■ Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time )■ Battery low flag (BOK) t(s■ Automatic power-fail chip deselec
M48Z30 M48Z30Y CMOS 32K x 8 ZEROPOWER SRAM INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with JEDEC STANDARD 32K x 8 SRAMs AUTOMATIC POWER-FAIL CHI
M48Z35 M48Z35Y 256 Kbit (32 Kbit x 8) ZEROPOWER® SRAM Features ■ Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages: (VPFD = power-fail desele
M48Z30 M48Z30Y CMOS 32K x 8 ZEROPOWER SRAM INTEGRATED LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS of DATA RETENTION in the ABSENCE of POWER PIN and FUNCTION COMPATIBLE with JEDEC STANDARD 32K x 8 SRAMs AUTOMATIC POWER-FAIL CHIP
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