Datasheet ICSSSTUAF32865A Equivalent ( PDF )

N.º	Número de pieza	Descripción	Fabricantes	PDF
1	ICSSSTUAF32865A	25-BIT CONFIGURABLE REGISTERED BUFFER DATASHEET 28-BIT 1:2 REGISTERED BUFFER WITH PARITY IDT74SSTUBF32865A The IDT74SSTUBF32865A includes a parity checking function. The IDT74SSTUBF32865A accepts a parity bit from the memory controller at its input pin PARIN, compares it with the data received on the D-inputs and	IDT

ICSSSTUAF328 Datasheet ( Hoja de datos ) - resultados coincidentes

Número de pieza	Descripción	Fabricantes	PDF
ICSSSTUAF32869A	14-BIT CONFIGURABLE REGISTERED BUFFER DATASHEET 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 ICSSSTUAF32869A The ICSSSTUAF32869A includes a parity checking function. The ICSSSTUAF32869A accepts a parity bit from the memory controller at its input pin PARIN one or two cycles after the correspo	IDT
ICSSSTUAF32868B	28-BIT CONFIGURABLE REGISTERED BUFFER DATASHEET 28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 ICSSSTUAF32868B QERR pin (active low). The convention is even parity, i.e., valid parity is defined as an even number of ones across the DIMM-independent data inputs combined with the parity input bit	IDT
ICSSSTUAF32868A	28-BIT CONFIGURABLE REGISTERED BUFFER DATASHEET 28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 CONFIDENTIAL ICSSSTUAF32868A Description This 28-bit 1:2 configurable registered buffer is designed for 1.7V to 1.9V VDD operation. All inputs are compatible with the JEDEC standard for SSTL_18, exc	IDT

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Número de pieza	Descripción	Fabricantes	PDF
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