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Agilent HDMP-0482 Octal Cell Port Bypass Circuit with CDR and Data Valid Detection Data Sheet Features • Supports 1.0625 GBd fibre channel operation • Supports 1.25 GBd Gigabit Ethernet (GE) operation • Octal cell PBC/CDR in one package • CDR location determined by choic
Agilent HDMP-0480 Octal Cell Port Bypass Circuit without Clock and Data Recovery Data Sheet Features • Supports 1.0625 GBd fibre channel operation • Supports 1.25 GBd gigabit Ethernet (GE) operation • Octal cell PBC in one package • Valid amplitude detection on FM_NODE[7
Agilent HDMP-0440 Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops Data Sheet Features • Supports 1.0625 GBd Fibre Channel operation • Supports 1.25 GBd Gigabit Ethernet (GE) operation • Quad PBC in one package • Equalizers on all inputs • High-speed LVPECL
Port Bypass Circuits for Fibre Channel Arbitrated Loop Standard and its Extensions Technical Data Features • Supports ANSI X3T11 1.0625 Gbps FC-AL Loop Configuration • Supports 802.3z 1.25 Gbps Gigabit Ethernet (GE) Rates • Single PBC, CDR, Dual Signal Detect (SD) in a Sin
Agilent HDMP-0452 Quad Port Bypass Circuit with CDR for Fibre Channel Arbitrated Loops Data Sheet Description The HDMP-0452 is a Quad Port Bypass Circuit (PBC) with a Clock and Data Recovery (CDR) circuit included. This device minimizes part count, cost and jitter accumulation
Agilent HDMP-0450 Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops Data Sheet Description The HDMP-0450 is a Quad Port Bypass Circuit (PBC) which provides a low-cost, low-power physical-layer solution for Fibre Channel Arbitrated Loop (FC-AL) disk array configuration
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