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CY7C1512 전자부품 데이터시트



CY7C1512 전자부품 회로 및
기능 검색 결과



CY7C1512  

Cypress Semiconductor
Cypress Semiconductor

CY7C1512

64K x 8 Static RAM

1CY 7C15 12 PRELIMINARY CY7C1512 64K x 8 Static RAM Features • High speed — tAA = 15 ns • CMOS for optimum speed/power • Low active power — 770 mW • Low standby power — 28 mW • Automatic power-down when deselected • TTL



CY7C1512AV18  

Cypress Semiconductor
Cypress Semiconductor

CY7C1512AV18

72-Mbit QDR-II SRAM 2-Word Burst Architecture

CY7C1510AV18, CY7C1525AV18 CY7C1512AV18, CY7C1514AV18 72-Mbit QDR™-II SRAM 2-Word Burst Architecture Features ■ Configurations CY7C1510AV18 – 8M x 8 CY7C1525AV18 – 8M x 9 CY7C1512AV18 – 4M x 18 CY7C1514AV18 – 2M x 36 Separate



CY7C1512KV18  

Cypress Semiconductor
Cypress Semiconductor

CY7C1512KV18

72-Mbit QDR II SRAM Two-Word Burst Architecture

CY7C1525KV18 CY7C1512KV18 CY7C1514KV18 72-Mbit QDR® II SRAM Two-Word Burst Architecture 72-Mbit QDR® II SRAM Two-Word Burst Architecture Features ■ Separate independent read and write data ports ❐ Supports concurrent transactions ■ 350 MHz clock for h



CY7C1512V18  

Cypress Semiconductor
Cypress Semiconductor

CY7C1512V18

1.8V Synchronous Pipelined SRAM

CY7C1510V18, CY7C1525V18 CY7C1512V18, CY7C1514V18 72-Mbit QDR™-II SRAM 2-Word Burst Architecture Features ■ Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■ 2-word burst on all a



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