CY7C1471BV25
Cypress Semiconductor
72-Mbit (2 M x 36) Flow-Through SRAMCY7C1471BV25
72-Mbit (2 M × 36) Flow-Through SRAM with NoBL™ Architecture
72-Mbit (2 M × 36/1 M × 72) Flow-Through SRAM with NoBL™ Architecture
Features
■ No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles
CY7C1471BV33
72-Mbit (2 M x 36/4 M x 18) Flow-Through SRAMCY7C1471BV33 CY7C1473BV33
72-Mbit (2 M × 36/4 M × 18) Flow-Through SRAM with NoBL™ Architecture
72-Mbit (2 M × 36/4 M × 18) Flow-Through SRAM with NoBL™ Architecture
Features
■ No bus latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles
■ Supports up to
Cypress Semiconductor
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