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Data Sheet 3.3 V, 200 Mbps, Half- and Full-Duplex, High Speed M-LVDS Transceivers ADN4691E/ADN4693E/ADN4696E/ADN4697E FEATURES Multipoint LVDS transceivers (low voltage differential signaling driver and receiver pairs) Switching rate: 200 Mbps (100 MHz) Supported bus loads: 30 Ω to 55 Ω Choice
Data Sheet 3.3 V, 200 Mbps, Half- and Full-Duplex, High Speed M-LVDS Transceivers ADN4691E/ADN4693E/ADN4696E/ADN4697E FEATURES Multipoint LVDS transceivers (low voltage differential signaling driver and receiver pairs) Switching rate: 200 Mbps (100 MHz) Supported bus loads: 30 Ω to 55 Ω Choice
Data Sheet 3.3 V, 200 Mbps, Half- and Full-Duplex, High Speed M-LVDS Transceivers ADN4691E/ADN4693E/ADN4696E/ADN4697E FEATURES Multipoint LVDS transceivers (low voltage differential signaling driver and receiver pairs) Switching rate: 200 Mbps (100 MHz) Supported bus loads: 30 Ω to 55 Ω Choice
Data Sheet 3.3 V, 200 Mbps, Half- and Full-Duplex, High Speed M-LVDS Transceivers ADN4691E/ADN4693E/ADN4696E/ADN4697E FEATURES Multipoint LVDS transceivers (low voltage differential signaling driver and receiver pairs) Switching rate: 200 Mbps (100 MHz) Supported bus loads: 30 Ω to 55 Ω Choice
Data Sheet FEATURES Low output skew <30 ps (typical) Distributes one differential clock input to 10 LVDS clock outputs Programmable—one of two differential clock inputs can be selected (CLK0, CLK1) and individual differential clock outputs enabled/disabled Signaling rate up to 1.1 GHz (typical) 2.
3 V, LVDS, Quad CMOS Differential Line Receiver ADN4666 FUNCTIONAL BLOCK DIAGRAM ADN4666 RIN1– RIN1+ R1 ROUT1 EN R4 ROUT4 EN VCC RIN4– RIN4+ FEATURES ±8 kV ESD IEC 61000-4-2 contact discharge on receiver input pins 400 Mbps (200 MHz) switching rates 100 ps channel-to-chann
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