AD9768 전자부품 데이터시트

Dual, Low Power, 8-/10-/12-/14-Bit TxDAC Digital-to-Analog Converters AD9714/AD9715/AD9716/AD9717 FEATURES Power dissipation @ 3.3 V, 2 mA output 37 mW @ 10 MSPS 86 mW @ 125 MSPS Sleep mode: <3 mW @ 3.3 V Supply voltage: 1.8 V to 3.3 V SFDR to Nyquist 84 dBc @ 1 MHz output 75 dBc @ 10 MHz output AD

a 14-Bit, 300 MSPS High Speed TxDAC+® D/A Converter AD9755 FEATURES 14-Bit Dual Muxed Port DAC 300 MSPS Output Update Rate Excellent SFDR and IMD Performance SFDR to Nyquist @ 25 MHz Output: 71 dB Internal Clock Doubling PLL Differential or Single-Ended Clock Input On-Chip 1.2 V Reference Single

FEATURES 12-Bit Dual Muxed Port DAC 300 MSPS Output Update Rate Excellent SFDR and IMD Performance SFDR to Nyquist @ 25 MHz Output: 69 dB Internal Clock Doubling PLL Differential or Single-Ended Clock Input On-Chip 1.2 V Reference Single 3.3 V Supply Operation Power Dissipation: 155 mW @ 3.3 V 48-Le

16-Bit, 200 MSPS/500 MSPS TxDAC+® with 2×/4×/8× Interpolation and Signal Processing AD9786 FEATURES PRODUCT HIGHLIGHTS 16-bit resolution, 200 MSPS input data rate IMD 90 dBc @10 MHz 1. 16-bit, high speed, interpolating TxDAC+. Noise spectral density (NSD): −164 dBm/Hz @ 10 MHz 2. 2×/4×

FEATURES 8-bit dual transmit digital-to-analog converter (DAC) 125 MSPS update rate Excellent SFDR to Nyquist @ 5 MHz output: 66 dBc Excellent gain and offset matching: 0.1% Fully independent or single-resistor gain control Dual port or interleaved data On-chip 1.2 V reference Single 5 V or 3.3 V su

Data Sheet FEATURES High dynamic range, dual DAC parts Low noise and intermodulation distortion Single carrier W-CDMA ACLR = 80 dBc @ 61.44 MHz IF Innovative switching output stage permits usable outputs beyond Nyquist frequency LVDS inputs with dual-port or optional interleaved single- port operati