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12-Bit, 20 MSPS/40 MSPS/65 MSPS Dual A/D Converter AD9238 FEATURES Integrated dual 12-bit ADC Single 3 V supply operation (2.7 V to 3.6 V) SNR = 70 dB (to Nyquist, AD9238-65) SFDR = 80.5 dBc (to Nyquist, AD9238-65) Low power: 300 mW/channel at 65 MSPS Differential input with 500 MHz, 3 dB bandwidth
10 MHz Bandwidth, 640 MSPS Dual Continuous Time Sigma-Delta Modulator AD9267 FEATURES SNR: 83 dB (85 dBFS) to 10 MHz input SFDR: −88 dBc to 10 MHz input Noise figure: 15 dB Input impedance: 1 kΩ Power: 416 mW 10 MHz real or 20 MHz complex bandwidth 1.8 V analog supply operation On-chip PLL clock
16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC AD9262 FEATURES SNR: 83 dB (85 dBFS) to 10 MHz input SFDR: −87 dBc to 10 MHz input Noise figure: 15 dB Input impedance: 1 kΩ Power: 600 mW 1.8 V analog supply operation 1.8 V to 3.3 V output supply Selectable
Data Sheet FEATURES 4 ADCs integrated into 1 package 98 mW ADC power per channel at 50 MSPS SNR = 73 dB (to Nyquist) ENOB = 12 bits SFDR = 84 dBc (to Nyquist) Excellent linearity DNL = ±0.5 LSB (typical) INL = ±1.5 LSB (typical) Serial LVDS (ANSI-644, default) Low power, reduced signal option (sim
Data Sheet FEATURES 4 ADCs integrated into 1 package 94 mW ADC power per channel at 65 MSPS SNR = 60 dB (to Nyquist) ENOB = 9.7 bits SFDR = 78 dBc (to Nyquist) Excellent linearity DNL = ±0.2 LSB (typical) INL = ±0.3 LSB (typical) Serial LVDS (ANSI-644, default) Low power, reduced signal option (si
FEATURES Four ADCs in one package Serial LVDS digital output data rates to 520 Mbps (ANSI-644) Data and frame clock outputs SNR = 48 dBc (to Nyquist) Excellent linearity DNL = ±0.2 LSB (typical) INL = ±0.25 LSB (typical) 300 MHz full power analog bandwidth Power dissipation = 112 mW/channel at 65
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PartNumber.co.kr | 2020 | 연락처 |