AD6459 전자부품 데이터시트

a FEATURES Fully Compliant with Standard and Enhanced GSM Specification –12 dBm Input 1 dB Compression Point –2 dBm Input Third Order Intercept 10 dB SSB Noise Figure (330 ⍀) DC–400 MHz RF and LO Bandwidths Linear IF Amplifier Linear-in-dB and Stable over Temperature Voltage Gain Control Qua

a FEATURES Matched Offset Voltage Matched Offset Voltage Over Temperature Matched Bias Currents Crosstalk –124 dB at 1 kHz Low Bias Current: 35 pA max Warmed Up Low Offset Voltage: 500 ␮V max Low Input Voltage Noise: 2 ␮ V p-p High Slew Rate: 13 V/␮s Low Quiescent Current: 4.5 mA max Fast Se

a Enhanced GSM Processor AD6426 CHANNEL CODEC VOICEBAND / BASEBAND CODEC INTERFACE TEST INTERFACE Preliminary Technical Information FEATURES Complete Single Chip GSM Processor Channel Codec Subsystem including Channel Coder/Decoder Interleaver/De-interleaver Encryption/Decryption Control Processor

a FEATURES Fully Compliant with Standard and Enhanced GSM Specification DC-350 MHz RF Bandwidths 80 dB Gain Control Range I/Q Modulation and Demodulation Onboard Phase Locked Tunable Oscillator On-Chip Noise Roofing IF Filters Ultralow Power Design 2.7 V–3.6 V Operating Voltage User-Selectable Pow

a FEATURES Complete Analog Front End for ADSL Modems Part of ADI ADSL Chipset (AD20msp930) Designed to ANSI T1.413/ETSI TR238/ITU G.adsl Performance e.g., 6.1 Mbps Downstream Over 12K Ft. Suitable for CO or CPE (ATU-C and ATU-R) Includes Transmit and Receive Signal Paths: DAC: 20 MSPS 14-Bit Current

a FEATURES On-Chip Regulator PLL Demodulator On-Chip VCO No Trims Excellent Sensitivity 28-Lead SSOP Package APPLICATIONS DECT/PWT/WLAN TDMA FM/FSK Systems IFIN IF Transceiver Subsystem AD6402 FUNCTIONAL BLOCK DIAGRAM RSSI LIMITER/FILTER PLL DEMOD TXOUT TXOUTB 2 CFILT DOUT DFILP AD6402 VCO IF VCO