74LVC3G17GT
NXP Semiconductors
Triple non-inverting Schmitt trigger with 5 V tolerant input74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
Rev. 03 — 31 January 2005 Product data sheet
1. General description
The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS co
74LVC3G17DP
Triple non-inverting Schmitt trigger with 5 V tolerant input74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
Rev. 03 — 31 January 2005 Product data sheet
1. General description
The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be dri
NXP Semiconductors
PDF
74LVC3G17DC
Triple non-inverting Schmitt trigger with 5 V tolerant input74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
Rev. 03 — 31 January 2005 Product data sheet
1. General description
The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be dri
NXP Semiconductors
PDF
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
Rev. 03 — 31 January 2005 Product data sheet
1. General description
The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be dri
NXP Semiconductors
PDF