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74LVC3G14DP  

NXP Semiconductors
NXP Semiconductors

74LVC3G14DP

Triple inverting Schmitt trigger with 5 V tolerant input

74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 03 — 31 January 2005 Product data sheet 1. General description The 74LVC3G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compat




관련 부품 74LVC3G14 상세설명

74LVC3G14GT  

  
Triple inverting Schmitt trigger with 5 V tolerant input

74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 03 — 31 January 2005 Product data sheet 1. General description The 74LVC3G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL-families. Inputs can be driven



NXP Semiconductors
NXP Semiconductors

PDF



74LVC3G14DC  

  
Triple inverting Schmitt trigger with 5 V tolerant input

74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 03 — 31 January 2005 Product data sheet 1. General description The 74LVC3G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL-families. Inputs can be driven



NXP Semiconductors
NXP Semiconductors

PDF



74LVC3G14  

  
Triple inverting Schmitt trigger with 5 V tolerant input

74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 03 — 31 January 2005 Product data sheet 1. General description The 74LVC3G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL-families. Inputs can be driven



NXP Semiconductors
NXP Semiconductors

PDF




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