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Datasheet 74LS48 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 4 | 74LS48 | BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS |
 Texas Instruments |
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| 3 | 74LS48 | BCD-to-Seven-Segment Decoder Driver(Internal Pull-up outputs) Unit: mm
19.20 20.32 Max 14 8 6.30 7.40 Max 1
2.39 Max
1.30
7 7.62
0.51 Min
2.54 Min 5.06 Max
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
+ 0.10
Hitachi Code JEDEC EIAJ Weight (reference value)
DP-14 Conforms Conforms 0.97 g
Unit: mm
10.06 10.5 Max 14 8 5.5 1 7 *0.22 ± 0.05 0.20 |
 Hitachi Semiconductor |
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| 2 | 74LS48 | BCD TO 7-SEGMENT DECODER SN54/74LS48 BCD TO 7-SEGMENT DECODER
The SN54 / 74LS48 is a BCD to 7-Segment Decoder consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. Seven NAND gates and one driver are connected in pairs to make BCD data and its complement available to the seven decoding AND-OR-INVERT gates. |
 Motorola Semiconductors |
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| 1 | 74LS48 | BCD to 7-Segment Decoder DM74LS48 BCD to 7-Segment Decoder
January 1992
DM74LS48 BCD to 7-Segment Decoder
General Description
The ’LS48 translates four lines of BCD (8421) input data into the 7-segment numeral code and provides seven corresponding outputs having pull-up resistors as opposed to totem pole pull-ups These |
 National Semiconductor |
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