74F109PC
Fairchild Semiconductor
Dual JK Positive Edge-Triggered Flip-Flop74F109 Dual JK Positive Edge-Triggered Flip-Flop
April 1988 Revised November 1999
74F109 Dual JK Positive Edge-Triggered Flip-Flop
General Description
The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking
74F109PC
National Semiconductor
Dual JK Positive Edge-Triggered Flip-Flop54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop
54F/74F109
November 1994
54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop
General Description
The ’F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clock