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Datasheet 74AUP1G17 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 3 | 74AUP1G17 | Low-power Schmitt-trigger buffer
74AUP1G17
Low-power Schmitt-trigger buffer
Rev. 01 — 26 July 2005 Product data sheet
1. General description
The 74AUP1G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all |
 NXP Semiconductors |
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| 2 | 74AUP1G17 | SINGLE SCHMITT-TRIGGER BUFFER 74AUP1G17
SINGLE SCHMITT-TRIGGER BUFFER
Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
Pin Assignments
The AUP1G17 is a single 1-input Schmitt-trigger buffer gate with a push-pull output designed for o |
 Diodes |
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| 1 | 74AUP1G175 | Low Power D-Type Flip-Flop
74AUP1G175
Low-power D-type flip-flop with reset; positive-edge trigger
Rev. 01 — 15 November 2006 Product data sheet
1. General description
The 74AUP1G175 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL fami |
NXP Semiconductors |
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