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PDF GA10JT12-CAL Data sheet ( Hoja de datos )

Número de pieza GA10JT12-CAL
Descripción Normally - OFF Silicon Carbide Junction Transistor
Fabricantes GeneSiC 
Logotipo GeneSiC Logotipo



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GA10JT12-CAL
Normally – OFF Silicon Carbide
Junction Transistor
Features
250 °C Maximum Operating Temperature
Gate Oxide Free SiC Switch
Exceptional Safe Operating Area
Excellent Gain Linearity
Temperature Independent Switching Performance
Low Output Capacitance
Positive Temperature Coefficient of RDS,ON
Suitable for Connecting an Anti-parallel Diode
Advantages
Compatible with Si MOSFET/IGBT Gate Drive ICs
> 20 µs Short-Circuit Withstand Capability
Lowest-in-class Conduction Losses
High Circuit Efficiency
Minimal Input Signal Distortion
High Amplifier Bandwidth
Package
VDS
RDS(ON)
ID (Tc = 25°C)
hFE (Tc = 25°C)
=
=
=
=
1200 V
120 mΩ
25 A
80
D
G
S
Applications
Down Hole Oil Drilling, Geothermal Instrumentation
Hybrid Electric Vehicles (HEV)
Solar Inverters
Switched-Mode Power Supply (SMPS)
Power Factor Correction (PFC)
Induction Heating
Uninterruptible Power Supply (UPS)
Motor Drives
Table of Contents
Section I: Absolute Maximum Ratings .......................................................................................................... 1 
Section II: Static Electrical Characteristics................................................................................................... 2 
Section III: Dynamic Electrical Characteristics ............................................................................................ 2 
Section IV: Figures .......................................................................................................................................... 3 
Section V: GA10JT12-CAL Gate Drive Theory of Operation ....................................................................... 5 
Section VI: Mechanical Parameters ............................................................................................................... 6 
Section VII: Chip Dimensions......................................................................................................................... 6 
Section VIII: SPICE Model Parameters .......................................................................................................... 8 
Section I: Absolute Maximum Ratings
Parameter
Drain – Source Voltage
Continuous Drain Current
Continuous Drain Current
Continuous Gate Current
Turn-Off Safe Operating Area
Short Circuit Safe Operating Area
Reverse Gate – Source Voltage
Reverse Drain – Source Voltage
Power Dissipation
Storage Temperature
Symbol
VDS
ID
ID
IG
RBSOA
SCSOA
VSG
VSD
Ptot
Tstg
VGS = 0 V
TC = 25°C
TC = 155°C
Conditions
TVJ = 250 oC,
Clamped Inductive Load
TVJ = 250 oC, IG = 1 A, VDS = 800 V,
Non Repetitive
TC = 25 °C / 155 °C, tp > 100 ms
Value
1200
25
10
1.3
ID,max = 10
@ VDS VDSmax
>20
30
25
170 / 22
-55 to 250
Unit Notes
V
A
A
A
A
µs
V
V
W
°C
Sept 2014
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
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GA10JT12-CAL pdf
GA10JT12-CAL
Section V: GA10JT12-CAL Gate Drive Theory of Operation
The SJT transistor is a current controlled transistor which requires a positive gate current for turn-on as well as to remain in on-state. An ideal
gate current waveform for ultra-fast switching of the SJT, while maintaining low gate drive losses, is shown in Figure 11.
Figure 11: Idealized Gate Current Waveform
A: Gate Currents, IG,pk/-IG,pk and Voltages during Turn-On and Turn-Off
An SJT is rapidly switched from its blocking state to on-state, when the necessary gate charge, QG, for turn-on is supplied by a burst of high
gate current, IG,on, until the gate-source capacitance, CGS, and gate-drain capacitance, CGD, are fully charged.
,
As an example, an IG,pon 2.5 A is required to achieve a 18 ns VDS fall time for a 800 V switching transition, due to the gate-drain charge, QGD
of 44 nC for the GA10JT12-CAL. The IG,pon pulse should ideally terminate, when the drain voltage falls to its on-state value, in order to avoid
unnecessary drive losses during the steady on-state. In practice, the rise time of the IG,on pulse is affected by the parasitic inductances, Lpar in
the TO-247 package and drive circuit. A voltage developed across the parasitic inductance in the source path, Ls, can de-bias the gate-source
junction, when high drain currents begin to flow through the device. The applied gate voltage should be maintained high enough, above the
VGS,ON (see Figure 7) level to counter these effects.
A high negative peak current, -IG,off is recommended at the start of the turn-off transition, in order to rapidly sweep out the injected carriers from
the gate, and achieve rapid turn-off. While satisfactory turn off can be achieved with VGS = 0 V, a negative gate voltage VGS may be used in
order to speed up the turn-off transition.
B: Steady On-State
After the device is turned on, IG may be advantageously lowered to IG,steady for reducing unnecessary gate drive losses. The IG,steady is
determined by noting the DC current gain, hFE, of the device from Figures 5 and 6.
The desired IG,steady is determined by the peak device junction temperature TJ during operation, drain current ID, DC current gain hFE, and a
50 % safety margin to ensure operating the device in the saturation region with low on-state voltage drop by the equation:
, , 1.5
Sept 2014
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
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