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NEC |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK4057
SWITCHING
N-CHANNEL POWER MOSFET
DESCRIPTION
The 2SK4057 is N-channel MOSFET device that features a low on-state resistance and excellent switching
characteristics, and designed for low voltage high current applications such as DC/DC converter with synchronous
rectifier.
FEATURES
• Low on-state resistance
RDS(on)1 = 15.0 mΩ MAX. (VGS = 10 V, ID = 15 A)
• Low QGD: QGD = 2.8 nC TYP.
• 4.5 V drive available
<R>
ORDERING INFORMATION
PART NUMBER
2SK4057(1)-S27-AY Note
2SK4057-ZK-E1-AY Note
2SK4057-ZK-E2-AY Note
PACKAGE
TO-251 (MP-3-b)
TO-252 (MP-3ZK)
TO-252 (MP-3ZK)
Note Pb-free (This product does not contain Pb in external electrode.)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
25
Gate to Source Voltage (VDS = 0 V)
VGSS
±20
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
ID(DC)
ID(pulse)
±30
±100
Total Power Dissipation (TC = 25°C)
PT1 19
Total Power Dissipation
PT2 1.0
Channel Temperature
Tch 150
Storage Temperature
Single Avalanche Current Note2
Single Avalanche Energy Note2
Tstg −55 to +150
IAS 17
EAS 28.9
V
V
A
A
W
W
°C
°C
A
mJ
Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 12 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH
(TO-251)
(TO-252)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D18034EJ2V0DS00 (2nd edition)
Date Published March 2007 NS CP(K)
Printed in Japan
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
2006
2SK4057
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS VDS = 25 V, VGS = 0 V
Gate Leakage Current
IGSS VGS = ±20 V, VDS = 0 V
Gate Cut-off Voltage
Forward Transfer Admittance Note
Drain to Source On-state Resistance Note
VGS(off)
| yfs |
RDS(on)1
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 7.5 A
VGS = 10 V, ID = 15 A
RDS(on)2 VGS = 4.5 V, ID = 15 A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Ciss
Coss
Crss
td(on)
tr
td(off)
VDS = 10 V
VGS = 0 V
f = 1 MHz
VDD = 12 V, ID = 15 A
VGS = 10 V
RG = 3 Ω
Fall Time
tf
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
QG
QGS
QGD
VDD = 12 V
VGS = 12 V
ID = 30 A
Gate Resistance
Body Diode Forward Voltage Note
RG
VF(S-D)
IF = 30 A, VGS = 0 V
Reverse Recovery Time
trr IF = 30 A, VGS = 0 V
Reverse Recovery Charge
Qrr di/dt = 100 A/μs
Note Pulsed
MIN.
1.5
5
TYP.
2.1
9.4
11.4
18.5
720
210
90
7.1
3.3
23
5.1
14.5
1.9
2.8
3.4
0.95
26
22
MAX.
10
±100
2.5
15.0
25.0
1.5
UNIT
μA
nA
V
S
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Ω
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
PG.
VGS = 20 → 0 V
50 Ω
L
VDD
ID
VDD
IAS
BVDSS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
PG. RG
VGS
0
τ
τ = 1 μs
Duty Cycle ≤ 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
Wave Form
0
td(on)
VGS 90%
90%
10% 10%
tr td(off)
tf
ton toff
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
2 Data Sheet D18034EJ2V0DS
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