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PDF STU410S Data sheet ( Hoja de datos )
| Número de pieza | STU410S | |
| Descripción | N-Channel Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | SamHop Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de STU410S (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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S T U/D410S
S amHop Microelectronics C orp.
Mar. 26 2007
N-C hannel Logic Level E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
VDS S
40V
ID R DS (ON) ( m W ) Max
20 @ VGS = 10V
30A
30 @ VGS = 4.5V
F E AT UR E S
S uper high dense cell design for low R DS(ON).
R ugged and reliable.
S urface Mount P ackage.
E S D P rotected.
D
D
G
S
S TU S E R IE S
T O -252AA(D-P AK )
GDS
S TD S E R IE S
TO-251(l-P AK)
G
S
ABS OLUTE MAXIMUM R ATINGS (TA=25 C unless otherwise noted)
P arameter
Drain-S ource Voltage
Gate-S ource Voltage
Drain C urrent-C ontinuous a @ TC=25 C
-P ulsed b
Drain-S ource Diode Forward C urrent
Maximum P ower Dissipation @ Tc=25 C
Operating and S torage Temperature R ange
S ymbol
VDS
VGS
ID
IDM
IS
PD
TJ, TSTG
Limit
40
20
30
100
8
50
-55 to 175
Unit
V
V
A
A
A
W
C
THE R MAL CHAR ACTE R IS TICS
Thermal R esistance, Junction-to-C ase
Thermal R esistance, Junction-to-Ambient
R JC
R JA
3
50
C /W
C /W
1
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S T U/D410S
900 10
VDS =20V
750 C iss 8 ID=10A
600
6
450
300
C oss
6 150
4
2
C rss
0
0 5 10 15 20 25 30
0
0 3 6 9 12 15 18 21 24
V DS , Drain-to S ource Voltage (V )
F igure 9. C apacitance
Qg, T otal G ate C harge (nC )
F igure 10. G ate C harge
220
100
60
10
T D(off)
Tr
T D(on)
Tf
150
100
10
R DS(ON) Limit
1
1ms
10ms
100
1s
ms
DC
V DS =15V ,ID=1A
1 V G S =10V
1 6 10 60 100 300 600
R g, G ate R es is tance (ı )
F igure 11.s witching characteris tics
2
1
D =0 . 5
V GS =10V
S ingle P ulse
Tc=25 C
0.1
0.1 1
10 30 60
V DS , Drain-S ource V oltage (V )
F igure 12. Maximum S afe
O perating Area
0.2
0.1
0.1 0.05
0.02
0.01
0.01
10-5
S INGLE PULS E
10-4
10-3
10-2
10-1
S quare Wave P uls e Duration (s ec)
P DM
t1
t2
1. R ⋇JA (t)=r (t) * R ⋇JA
2. R ⋇JA=S ee Datas heet
3. T J M-T A = P DM* R ⋇J A (t)
4. Duty C ycle, D=t1/t2
1
10
F igure 13. Normalized T hermal T rans ient Impedance C urve
5
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| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet STU410S.PDF ] | |
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