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PDF BLF6G22LS-75 Data sheet ( Hoja de datos )
| Número de pieza | BLF6G22LS-75 | |
| Descripción | Power LDMOS transistor | |
| Fabricantes | NXP Semiconductors | |
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BLF6G22LS-75
Power LDMOS transistor
Rev. 01 — 8 February 2008
Preliminary data sheet
1. Product profile
1.1 General description
75 W LDMOS power transistor for base station applications at frequencies from
2000 MHz to 2200 MHz.
Table 1. Typical performance
RF performance at Tcase = 25 °C in a common source class-AB production test circuit.
Mode of operation f
VDS PL(AV)
Gp ηD IMD3
(MHz)
(V) (W)
(dB) (%) (dBc)
2-carrier W-CDMA 2110 to 2170 28 17
18.7 30.5 −37.5[1]
ACPR
(dBc)
−41.5[1]
[1] Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7 dB at 0.01 % probability on CCDF per carrier;
carrier spacing 10 MHz.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features
I Typical 2-carrier W-CDMA performance at frequencies of 2110 MHz and 2170 MHz,
a supply voltage of 28 V and an IDq of 690 mA:
N Average output power = 17 W
N Gain = 18.7 dB
N Efficiency = 30.5 %
N IMD3 = −37.5 dBc
N ACPR = −41.5 dBc
I Easy power control
I Integrated ESD protection
I Excellent ruggedness
I High efficiency
I Excellent thermal stability
I Designed for broadband operation (2000 MHz to 2200 MHz)
I Internally matched for ease of use
I Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1 page  
www.DNatXaSPheSete4Um.coicmonductors
BLF6G22LS-75
Power LDMOS transistor
20
Gp
(dB)
19
Gp
ηD
18
001aah569 60
ηD
(%)
40
−25
IMD3,
ACPR
(dBc)
−35
20 −45
001aah570
IMD3
ACPR
17
0
0
10 20 30 40
PL(AV) (W)
VDS = 28 V; IDq = 690 mA; f1 = 2135 MHz;
f2 = 2145 MHz; carrier spacing 10 MHz.
Fig 4. 2-carrier W-CDMA power gain and drain
efficiency as functions of average load power;
typical values
−55
0
10 20 30 40
PL(AV) (W)
VDS = 28 V; IDq = 690 mA; f1 = 2135 MHz;
f2 = 2145 MHz; carrier spacing 10 MHz.
Fig 5. 2-carrier W-CDMA adjacent power channel ratio
and third order intermodulation distortion as
functions of average load power; typical values
8. Test information
VGG
R1
C22
C8
C5
C6
C7
R2
C1
INPUT
C2
C3
C9
C4
VDD
C23
C10 C11 C12 C13
C14
C20
C21
OUTPUT
The drawing is not to scale.
Fig 6. Test circuit for operation at 800 MHz
C15 C16 C17 C18 C19
001aah571
BLF6G22LS-75_1
Preliminary data sheet
Rev. 01 — 8 February 2008
© NXP B.V. 2008. All rights reserved.
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