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P-Channel Enhancement Mode Field Effect Transistor



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CET
CEA6861 데이터시트, 핀배열, 회로
CEA6861
P-Channel Enhancement Mode Field Effect Transistor
FEATURES
-60V, -2.4A, RDS(ON) = 135m@VGS = -10V.
RDS(ON) = 180m@VGS = -4.5V.
High dense cell design for extremely low RDS(ON).
Rugged and reliable.
Lead free product is acquired.
SOT-89 package.
D
D
SOT-89
S
D
G
G
S
ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted
Parameter
Symbol
Limit
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
Drain Current-Pulsed a
VDS -60
VGS ±20
ID -2.4
IDM -10
Maximum Power Dissipation
PD 1.25
Operating and Store Temperature Range
TJ,Tstg
-55 to 150
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Ambient b
Symbol
RθJA
Limit
100
Units
V
V
A
A
W
C
Units
C/W
Details are subject to change without notice .
1
Rev 1. 2006.Sep
http://www.cetsemi.com


CEA6861 데이터시트, 핀배열, 회로
CEA6861
Electrical Characteristics Tc = 25 C unless otherwise noted
Parameter
Symbol
Test Condition
Off Characteristics
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics b
BVDSS
IDSS
IGSSF
IGSSR
VGS = 0V, ID = -250µA
VDS = -60V, VGS = 0V
VGS = 20V, VDS = 0V
VGS = -20V, VDS = 0V
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Dynamic Characteristics c
VGS(th)
RDS(on)
VGS = VDS, ID = -250µA
VGS = -10V, ID = -2.4A
VGS = -4.5V, ID = -1.9A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics c
Ciss
Coss
Crss
VDS = -30V, VGS = 0V,
f = 1.0 MHz
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
td(on)
tr
td(off)
VDD = -30V, ID = -1A,
VGS = -10V, RGEN = 6
Turn-Off Fall Time
tf
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Qg
Qgs
VDS = -30V, ID = -2.4A,
VGS = -10V
Qgd
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage b
IS
VSD
VGS = 0V, IS = -1.3A
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
c.Guaranteed by design, not subject to production testing.
Min
-60
-1
Typ Max Units
-1
100
-100
V
µA
nA
nA
-3 V
105 135 m
135 180 m
890 pF
90 pF
85 pF
13 26
5 10
39 78
13 26
11.2 14.8
2.6
1.8
ns
ns
ns
ns
nC
nC
nC
-2.4 A
-1.2 V
6
2




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P-Channel Enhancement Mode Field Effect Transistor - CET