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PDF 74ALVC16245 Data sheet ( Hoja de datos )
| Número de pieza | 74ALVC16245 | |
| Descripción | Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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74ALVC16245
Low−Voltage 1.8/2.5/3.3V
16−Bit Transceiver
With 3.6 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The 74ALVC16245 is an advanced performance, non−inverting
16−bit transceiver. It is designed for very high−speed, very low−power
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operation in 1.8 V, 2.5 V or 3.3 V systems.
The ALVC16245 is designed with byte control. It can be operated as
MARKING DIAGRAM
two separate octals, or with the controls tied together, as a 16−bit wide
function. The Transmit/Receive (T/Rn) inputs determine the direction
48
of data flow through the bi−directional transceiver. Transmit
(active−HIGH) enables data from A ports to B ports; Receive
(active−LOW) enables data from B to A ports. The Output Enable
48
1
74ALVC16245DT
AWLYYWW
inputs (OEn), when HIGH, disable both A and B ports by placing them
in a HIGH Z condition.
• Designed for Low Voltage Operation: VCC = 1.65−3.6 V
• 3.6 V Tolerant Inputs and Outputs
TSSOP−48
DT SUFFIX
CASE 1201
1
• High Speed Operation: 3.0 ns max for 3.0 to 3.6 V
3.7 ns max for 2.3 to 2.7 V
6.0 ns max for 1.65 to 1.95 V
• Static Drive: $24 mA Drive at 3.0 V
A = Assembly
Location
WL = Wafer Lot
YY = Year
WW = Work Week
$12 mA Drive at 2.3 V
$4 mA Drive at 1.65 V
• Supports Live Insertion and Withdrawal
• IOFF Specification Guarantees High Impedance When VCC = 0 V†
• Near Zero Static Supply Current in All Three Logic States (40 mA)
ORDERING INFORMATION
Device
Package
Shipping
74ALVC16245DTR TSSOP 2500/Tape & Reel
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds $250 mA @ 125°C
• ESD Performance: Human Body Model >2000 V; Machine Model >200 V
• Second Source to Industry Standard 74ALVC16245
†To ensure the outputs activate in the 3−state condition, the output enable pins
should be connected to VCC through a pull−up resistor. The value of the resistor is
determined by the current sinking capability of the output connected to the OE pin.
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 1
1
Publication Order Number:
74ALVC16245/D
1 page  
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
CIN Input Capacitance
COUT
Output Capacitance
CPD Power Dissipation Capacitance
12. VCC = 1.8, 2.5 or 3.3 V; VI = 0 V or VCC.
74ALVC16245
Condition
Note 12
Note 12
Note 12, 10 MHz
Typical
6
7
20
An, Bn
Bn, An
Vm
tPLH
Vm
Vm
tPHL
Vm
WAVEFORM 1 − PROPAGATION DELAYS
tR = tF = 2.0ns, 10% to 90%; f = 1MHz; tW = 500ns
OEn, T/Rn
An, Bn
An, Bn
Vm
tPZH tPHZ
Vm
Vm
tPZL tPLZ
Vm
WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.0ns, 10% to 90%; f = 1MHz; tW = 500ns
Figure 4. AC Waveforms
VIH
0V
VOH
VOL
VIH
0V
VOH
Vy
≈ 0V
≈ VCC
Vx
VOL
Symbol
VIH
Vm
Vx
Vy
3.3 V ±0.3 V
2.7 V
1.5 V
VOL + 0.3 V
VOH − 0.3 V
VCC
2.5 V ±0.2 V
VCC
VCC/2
VOL + 0.15 V
VOH − 0.15 V
1.8 V ±0.15 V
VCC
VCC/2
VOL + 0.15 V
VOH − 0.15 V
Unit
pF
pF
pF
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5
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet 74ALVC16245.PDF ] | |
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