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PDF L6360 Data sheet ( Hoja de datos )
| Número de pieza | L6360 | |
| Descripción | IO-Link communication master transceiver IC | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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L6360
IO-Link communication master transceiver IC
Features
■ Supply voltage from 18 to 32.5 V
■ Programmable output stages: high-side,
low-side or push-pull (< 2 Ω)
■ Up to 500 mA L+ protected high-side driver
■ Supports COM1, COM2 and COM3 mode
■ Additional IEC61131-2 type-1 input
■ Short-circuit and overcurrent output protection
through current limitation and programmable
cutoff current
■ 3.3 V / 5 V, 50 mA linear regulator
■ 5 mA IO-Link digital input
■ Fast mode I2C for IC control, configuration and
diagnostic
■ Diagnostic dual LED sequence generator and
driver
■ 5 V and 3.3 V compatible I/Os
■ Overvoltage protection (> 36 V)
■ Overtemperature protection
■ ESD protection
■ Miniaturized: VFQFPN-26L
3.5 x 5 x 1 mm package
Applications
■ Industrial sensors
■ Factory automation
■ Process control
Description
The L6360 is a monolithic IO-Link master port
compliant with PHY2 (3 wires) supporting COM1
(4.8 kbaud), COM2 (38.4 kbaud) and COM3
(230.4 kbaud) modes.
The C/QO output stage is programmable: high-
side, low-side or push-pull; also cutoff current,
Datasheet −production data
VFQFPN-26L 3.5 x 5 x 1 mm
cutoff current delay time, and restart delay are
programmable.
Cutoff current and cutoff current delay time,
combined with thermal shutdown and automatic
restart protect the device against overload and
short-circuit.
C/QO and L+ output stages are able to drive
resistive, inductive and capacitive loads. Inductive
loads up to 10 mJ can be driven.
Supplywww.DataSheet.net/ voltage is monitored and low voltage
conditions are detected.
The L6360 transfers, through the PHY2(C/QO
pin), data received from a host microcontroller
through the USART (IN C/QO pin), or to the
USART (OUT C/QI pin) data received from PHY2
(C/QI pin).
To enable full IC control, configuration and
monitoring (i.e. fault conditions stored in the
status register), the communication between the
system microcontroller and the L6360 is based on
a Fast mode 2-wire I2C.
The L6360 has nine registers to manage the
programmable parameters and the status of the
IC.
Monitored fault conditions are: L+ line,
overtemperature, C/Q overload, linear regulator
undervoltage, and parity check.
Internal LED driver circuitries, in open drain
configuration, provide two programmable
sequences to drive two LEDs.
March 2012
This is information on a product in full production.
Doc ID 022817 Rev 2
1/65
www.st.com
65
Datasheet pdf - http://www.DataSheet4U.co.kr/
1 page  
L6360
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
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Figure 25.
Figure 26.
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Figure 30.
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Figure 32.
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Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Rise/fall time test setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Normalized rise and fall time vs. output capacitor value (typ. values in push-pull
configuration) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
A master transmitter addressing a slave receiver with a 7-bit address
(the transfer is not changed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
A master reads data from the slave immediately after the first byte . . . . . . . . . . . . . . . . . . 19
Transfer sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
I2C communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Status register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Power-on bit behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Overtemperature (OVT) bit behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Cutoff behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Control register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Control register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
LED1 registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
LED2 registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Parity register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Power stage. Q2 is not present on L+ output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Fast demagnetization principle schematic. Load connected to L- . . . . . . . . . . . . . . . . . . . 38
Fast demagnetization waveform. Load connected to L- . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Slow demagnetization schematic block. Load connected to L- . . . . . . . . . . . . . . . . . . . . . 39
Slow demagnetization waveform. Load connected to GND . . . . . . . . . . . . . . . . . . . . . . . . 39
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Device initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Current Write mode flow chart procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Current Write mode frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Sequential Write mode flow chart procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Sequential Write mode frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Microcontroller parity check calculus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Register sequence in sequential Write mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Current Read mode flow chart procedure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Current Read mode frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Current read communication flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Sequential/random Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Sequential/random read communication flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Block diagram communication mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
System communication mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
C/Q or L+ channel cutoff protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
C/Q or L+ channel current limitation and cutoff protection with latched restart . . . . . . . . . 54
LED drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Linear regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Linear regulator principle schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Supply voltage protection with uni-directional Transil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Refined supply voltage protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
VH protection vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Doc ID 022817 Rev 2
5/65
Datasheet pdf - http://www.DataSheet4U.co.kr/
5 Page 
L6360
4
Recommended operating conditions
Recommended operating conditions
Table 4. Recommended operating conditions
Symbol
Parameter
Test condition
VCC
VH
fSCL
Rbias
TJ
Supply voltage
Linear regulator input voltage
SCL clock frequency
Precision resistance
Junction temperature
-
Min.
18
7
Typ.
-0.1% 124
-25
Max.
32.5
VCC
400
0.1%
125
Unit
V
V
kHz
kΩ
°C
Table 5.
Symbol
Thermal data
Parameter
Typ.
Unit
Rth j-case Thermal resistance, junction-to-case
Rth j-amb Thermal resistance, junction-to-ambient(1)
6 °C/W
50 °C/W
1. Mounted on FR4 PCB with 2 signal Cu layers and 2 power Cu layers interconnected through vias.
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Doc ID 022817 Rev 2
11/65
Datasheet pdf - http://www.DataSheet4U.co.kr/
11 Page | ||
| Páginas | Total 65 Páginas | |
| PDF Descargar | [ Datasheet L6360.PDF ] | |
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