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PDF WJLXT971A Data sheet ( Hoja de datos )
| Número de pieza | WJLXT971A | |
| Descripción | Single-Port 10/100 Mbps PHY Transceiver | |
| Fabricantes | Intel | |
| Logotipo |  |
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taShIPenHetteY4l TrLaXnTs9c7e1ivAerSingle-Port 10/100 MbpsDatasheet
.Da The Intel® LXT971A Single-Port 10/100 Mbps PHY Transceiver (called hereafter the LXT971A
w Transceiver) directly supports both 100BASE-TX and 10BASE-T applications. It provides a
w Media Independent Interface (MII) for easy attachment to 10/100 Media Access Controllers
(MACs). The LXT971A Transceiver is IEEE compliant, and provides a Low Voltage Positive
w Emitter Coupled Logic (LVPECL) interface for use with 100BASE-FX fiber networks. (This
mdocument also supports the Intel® LXT971 Transceiver.) The LXT971A Transceiver supports
full-duplex operation at 10 Mbps and 100 Mbps. Operating conditions for the LXT971A
oTransceiver can be set using auto-negotiation, parallel detection, or manual control. The
LXT971A Transceiver is fabricated with an advanced CMOS process and requires only a single
.c2.53.3 V power supply.
UApplications
t4■ Combination 10BASE-T/100BASE-TX or
100BASE-FX Network Interface Cards
(NICs)
e■ Network printers
■ 10/100 Personal Computer Memory Card
International Association (PCMCIA) cards
■ Cable Modems and Set-Top Boxes
eProduct Features
h■ 3.3 V Operation
■ Low power consumption (300 mW typical)
S■ Low-power “Sleep” mode
ta■ 10BASE-T and 100BASE-TX using a
single RJ-45 connection
■ IEEE 802.3-compliant 10BASE-T or
a100BASE-TX ports with integrated filters
■ Auto-negotiation and parallel detection
.D■ MII interface with extended register
capability
www .com■ Robust baseline wander correction
■ Carrier Sense Multiple Access / Collision
Detection (CSMA/CD) or full-duplex
operation
■ JTAG boundary scan
■ MDIO serial port or hardware pin
configurable
■ 100BASE-FX fiber-optic capable
■ Integrated, programmable LED drivers
— 64-ball Plastic Ball Grid Array (PBGA)
or 64-pin Quad Flat Package (LQFP)
— LXT971ABC - Commercial (0° to 70
°C ambient).
— LXT971ABE - Extended (-40° to
85 °C ambient).
— LXT971ALC - Commercial (0° to
70 °C ambient).
— LXT971ALE - Extended (-40° to
85 °C ambient).
.DataSheet4UDocument Number: 249414-003
www Revision Date: 25-Oct-2005
1 page  
Intel® LXT971A Single-Port 10/100 Mbps PHY Transceiver
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Intel® LXT971A Transceiver Block Diagram ...................................................... 12
Ball Assignments for Intel® LXT971A Transceiver 64-Ball PBGA ...................... 13
Pins for Intel® LXT971A Transceiver 64-Pin LQFP Package ............................. 14
Management Interface Read Frame Structure ................................................... 30
Management Interface Write Frame Structure ................................................... 30
Intel® LXT971A Transceiver MII Interrupt Logic ................................................. 31
Initialization Sequence for Intel® LXT971A Transceiver ..................................... 34
Hardware Configuration Settings .......................................................................38
Intel® LXT971A Transceiver Link Establishment Overview ................................ 39
Clocking for 10BASE-T ...................................................................................... 42
Clocking for 100BASE-X .................................................................................... 42
Clocking for Link Down Clock Transition ............................................................ 43
Intel® LXT971A Transceiver Loopback Paths ....................................................45
100BASE-X Frame Format ................................................................................ 46
100BASE-TX Data Path .....................................................................................47
100BASE-TX Reception with No Errors ............................................................. 48
100BASE-TX Reception with Invalid Symbol ..................................................... 48
100BASE-TX Transmission with No Errors ........................................................ 49
100BASE-TX Transmission with Collision .......................................................... 49
Intel® LXT971A Transceiver Protocol Sublayers ................................................ 50
LED Pulse Stretching ......................................................................................... 59
Intel® LXT971A Transceiver Typical Twisted-Pair Interface - Switch.................. 63
Intel® LXT971A Transceiver Typical Twisted-Pair Interface - NIC ...................... 64
Intel® LXT971A Transceiver Typical Media Independent Interface.....................65
Typical Interface - Intel® LXT971ATransceiver to 3.3 V Fiber Transceiver......... 67
Typical Interface - Intel® LXT971A Transceiver to 5 V Fiber Transceiver........... 68
Typical Interface - Intel® LXT971A Transceiver to Triple PECL-to-PECL
Logic Translator.................................................................................................69
Intel® LXT971A Transceiver 100BASE-TX Receive Timing - 4B Mode ..............76
Intel® LXT971A Transceiver 100BASE-TX Transmit Timing - 4B Mode ............. 77
Intel® LXT971A Transceiver 100BASE-FX Receive Timing................................ 78
Intel® LXT971A Transceiver 100BASE-FX Transmit Timing............................... 79
Intel® LXT971A Transceiver 10BASE-T Receive Timing ................................... 80
Intel® LXT971A Transceiver 10BASE-T Transmit Timing .................................. 81
Intel® LXT971A Transceiver 10BASE-T Jabber and Unjabber Timing ..............82
Intel® LXT971A Transceiver 10BASE-T SQE (Heartbeat) Timing .....................83
Intel® LXT971A Transceiver Auto-Negotiation and Fast Link Pulse Timing........ 84
Intel® LXT971A Transceiver Fast Link Pulse Timing .......................................... 84
Intel® LXT971A Transceiver MDIO Input Timing................................................. 85
Intel® LXT971A Transceiver MDIO Output Timing .............................................. 85
Intel® LXT971A Transceiver Power-Up Timing ................................................... 86
Intel® LXT971A Transceiver RESET_L Pulse Width and Recovery Timing........ 87
PHY Identifier Bit Mapping ................................................................................. 91
Intel® LXT971A Transceiver PBGA Package Specification .............................. 105
Intel® LXT971A Transceiver LQFP Package Specifications ............................. 106
Sample LQFP Package - Intel® LXT971A Transceiver ..................................... 107
Sample Pb-Free (RoHS-Compliant) LQFP Package -
Intel® LXT971A Transceiver.............................................................................. 107
Sample TPBGA Package - Intel® LXT971A Transceiver .................................. 108
Datasheet
Document Number: 249414-003
Revision Date: 25-Oct-2005
5
5 Page 
Intel® LXT971A Single-Port 10/100 Mbps PHY Transceiver
1.0 Introduction to This Document
This document includes information on the Intel® LXT971A Single-Port 10/100 Mbps PHY
Transceiver (called hereafter the LXT971A Transceiver).
1.1
Document Overview
This document includes the following subjects:
• Chapter 2.0, “Block Diagram for Intel® LXT971A Transceiver”
• Chapter 3.0, “Ball and Pin Assignments for Intel® LXT971A Transceiver”
• Chapter 4.0, “Signal Descriptions for Intel® LXT971A Transceiver”
• Chapter 5.0, “Functional Description”
• Chapter 6.0, “Application Information”
• Chapter 7.0, “Electrical Specifications”
• Chapter 8.0, “Register Definitions - IEEE Base Registers”
• Chapter 9.0, “Register Definitions - Product-Specific Registers”
• Chapter 10.0, “Intel® LXT971A Transceiver Package Specifications”
• Chapter 11.0, “Product Ordering Information”
1.2 Related Documents
Table 1. Related Documents from Intel
Document Title
Fiber Optic Transceivers Connecting a PECL Interface Application Note
Intel® 100BASE-FX Fiber Optic Transceivers - Connecting a PECL/
LVPECL Interface Application Note
Intel® LXT971A , LXT972A , LXT972M Single-Port 10/100 Mbps PHY
Transceivers Specification Update
Intel® LXT971A, LXT972A, and LXT972M 3.3V PHY Transceivers
Design and Layout Guide - Application Note
Magnetic Manufacturers for Networking Product Applications -
Application Note
Document
Number
249015
250781
249354
249016
248991
Datasheet
Document Number: 249414-003
Revision Date: June 18, 2004
11
11 Page | ||
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| PDF Descargar | [ Datasheet WJLXT971A.PDF ] | |
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