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74VCX2245 반도체 회로 부품 판매점

Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in B Outputs



Fairchild Semiconductor 로고
Fairchild Semiconductor
74VCX2245 데이터시트, 핀배열, 회로
March 1998
Revised April 1999
74VCX16841
Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant
Inputs and Outputs
General Description
The VCX16841 contains twenty non-inverting latches with
3-STATE outputs and is intended for bus oriented applica-
tions. The device is byte controlled. The flip-flops appear
transparent to the data when the Latch enable (LE) is
HIGH. When LE is LOW, the data that meets the setup time
is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The 74VCX16841 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74VCX16841 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.65V–3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD (Dn to On)
3.0 ns max for 3.0V to 3.6V VCC
3.4 ns max for 2.3V to 2.7V VCC
6.8 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion and withdrawal (Note 1)
s Static Drive (IOH/IOL)
±24 mA @ 3.0V VCC
±18 mA @ 2.3V VCC
±6 mA @ 1.65V VCC
s Uses patented noise/EMI reduction circuitry
s Latch-up performance exceeds 300 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Description
74VCX16841MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OEn
LEn
D0–D19
O0–O19
Description
Output Enable Input (Active LOW)
Latch Enable Input
Inputs
Outputs
© 1999 Fairchild Semiconductor Corporation DS500132.prf
www.fairchildsemi.com


74VCX2245 데이터시트, 핀배열, 회로
Connection Diagram
Truth Tables
Inputs
Outputs
LE1
OE1
D0–D9
O0–O9
XHX Z
HLL L
HLHH
L L X O0
Inputs
Outputs
LE2
OE2
D10–D19 O10–O19
XHX Z
HLL L
HLHH
L L X O0
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
O0 = Previous O0 before HIGH-to-LOW of Latch Enable
Functional Description
The 74VCX16841 contains twenty D-type latches with 3-
STATE outputs. The device is byte controlled with each
byte functioning identically, but independent of the other.
Control pins can be shorted together to obtain full 20-bit
operation. The following description applies to each byte.
When the Latch Enable (LEn) input is HIGH, data on the Dn
enters the latches. In this condition the latches are trans-
parent, i.e., a latch output will change states each time its
Logic Diagram
D-type input changes. When LEn is LOW, the latches store
information that was present on the D-type inputs a setup
time preceding the HIGH-to-LOW transition on LEn. The 3-
STATE outputs are controlled by the Output Enable (OEn)
input. When OEn is LOW the standard outputs are in the 2-
state mode. When OEn is HIGH, the standard outputs are
in the high impedance mode but this does not interfere with
entering new data into the latches.
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74VCX2245

Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in B Outputs - Fairchild Semiconductor