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PDF 74VCX16245 Data sheet ( Hoja de datos )

Número de pieza 74VCX16245
Descripción Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! 74VCX16245 Hoja de datos, Descripción, Manual

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October 1996
Revised June 2005
74VCX16245
Low Voltage 16-Bit Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16245 contains sixteen non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. Each
byte has separate 3-STATE control inputs which can be
shorted together for full 16-bit operation. The T/R inputs
determine the direction of data flow through the device.
The OE inputs disable both the A and B ports by placing
them in a high impedance state.
The 74VCX16245 is designed for low voltage (1.2V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74VCX16245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.2V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
2.5 ns max for 3.0V to 3.6V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
s Uses patented noise/EMI reduction circuitry
s Latchup performance exceeds 300 mA
s ESD performance:
Human body model ! 2000V
Machine model !200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Description
74VCX16245G
(Note 2)(Note 3)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74VCX16245MTD
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2: Ordering code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2005 Fairchild Semiconductor Corporation DS012169
www.fairchildsemi.com

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74VCX16245 pdf
Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
VOHV
Quiet Output Dynamic Valley VOH
Conditions
CL 30 pF, VIH VCC, VIL 0V
CL 30 pF, VIH VCC, VIL 0V
CL 30 pF, VIH VCC, VIL 0V
VCC TA 25qC Units
(V) Typical
1.8 0.25
2.5 0.6
V
3.3 0.8
1.8 0.25
2.5 0.6
V
3.3 0.8
1.8 1.5
2.5 1.9
V
3.3 2.2
Capacitance
Symbol
Parameter
CIN Input Capacitance
CI/O Output Capacitance
CPD Power Dissipation Capacitance
Conditions
VCC 1.8V, 2.5V, or 3.3V, VI 0V or VCC
VI 0V, or VCC, VCC 1.8V, 2.5V or 3.3V
VI 0V or VCC, F 10 MHz, VCC 1.8V, 2.5V or 3.3V
TA 25qC
Typical
6
7
20
Units
pF
pF
pF
5 www.fairchildsemi.com

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