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PDF 74LCXP16245MEA Data sheet ( Hoja de datos )

Número de pieza 74LCXP16245MEA
Descripción Low Voltage 16-Bit Bidirectional Transceiver with 5V Tolerant Inputs/Outputs and Pull-Down Resistors
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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August 1998
Revised April 1999
74LCXP16245
Low Voltage 16-Bit Bidirectional Transceiver with
5V Tolerant Inputs/Outputs and Pull-Down Resistors
General Description
The LCXP16245 contains sixteen non-inverting bidirec-
tional buffers with 3-STATE outputs and is intended for bus
oriented applications. The device is designed for low volt-
age (2.5V or 3.3V) VCC applications with capability of inter-
facing to a 5V signal environment. The device is byte
controlled. Each byte has separate control inputs which
could be shorted together for full 16-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
In addition, A and B port datapath pins have built-in resis-
tors to GND allowing the pins to float without any increase
in ICC current. This feature is intended to address modular
and space constrained applications where additional space
consumed by external resistors is not available.
The LCXP16245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s I/O Pull-down resistors terminate inactive busses ensur-
ing a stable bus state
s 5.5 ns tPD max (VCC = 3.3V), 20 µA ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Pinout compatible with 74 series 16245
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCXP16245MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LCXP16245MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin
Names
OEn
T/Rn
A0–A15
B0–B15
Description
Output Enable Input
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS500053.prf
www.fairchildsemi.com

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74LCXP16245MEA pdf
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
tPLH, tPHL
tPZL, tPLZ
tPZH,tPHZ
Switch
Open
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output Low Enable and
Disable Times for Logic
trise and tfall
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tR = tF = 3ns)
Symbol
Vmi
Vmo
Vx
Vy
3.3V ± 0.3V
1.5V
1.5V
VOL + 0.3V
VOH 0.3V
VCC
2.7V
1.5V
1.5V
VOL + 0.3V
VOH 0.3V
2.5V ± 0.2V
VCC/2
VCC/2
VOL + 0.15V
VOH 0.15V
5 www.fairchildsemi.com

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