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74ABT646AD 반도체 회로 부품 판매점

Octal bus transceiver/register 3-State



NXP Semiconductors 로고
NXP Semiconductors
74ABT646AD 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74ABT646A
Octal bus transceiver/register (3-State)
Product specification
Supersedes data of 1995 Sep 06
IC23 Data Handbook
1998 Feb 17
Philips
Semiconductors


74ABT646AD 데이터시트, 핀배열, 회로
Philips Semiconductors
Octal bus transceiver/register (3-State)
Product specification
74ABT646A
FEATURES
Combines 74ABT245 and 74ABT374 type functions in one device
Independent registers for A and B buses
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
Multiplexed real-time and stored data
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT646A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT646A transceiver/register consists of bus transceiver
circuits with 3-State outputs, D-type flip-flops, and control circuitry
arranged for multiplexed transmission of data directly from the input
bus or the internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes High. Output
Enable (OE) and DIR pins are provided to control the transceiver
function. In the transceiver mode, data present at the high
impedance port may be stored in either the A or B register or both.
The Select (SAB, SBA) pins determine whether data is stored or
transferred through the device in real-time. The DIR determines
which bus will receive data when the OE is active (Low). In the
isolation mode (OE = High), data from Bus A may be stored in the B
register and/or data from Bus B may be stored in the A register.
When an output function is disabled, the input function is still
enabled and may be used to store and transmit data. Only one of
the two buses, A or B, may be driven at a time. The examples on the
next page demonstrate the four fundamental bus management
functions that can be performed with the 74ABT646A.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH Propagation delay
tPHL An to Bn or Bn to An
CIN
Input capacitance
CP, S, OE, DIR
CI/O
ICCZ
I/O capacitance
Total supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF; VCC = 5V
VI = 0V or VCC
Outputs disabled;
VO = 0V or VCC
Outputs disabled; VCC =5.5V
TYPICAL
3.2
3.7
4
7
110
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT646A N
74ABT646A D
74ABT646A DB
74ABT646A PW
NORTH AMERICA
74ABT646A N
74ABT646A D
74ABT646A DB
7ABT646APW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
CPAB 1
SAB 2
DIR 3
A0 4
A1 5
A2 6
A3 7
A4 8
A5 9
A6 10
A7 11
GND 12
24 VCC
23 CPBA
22 SBA
21 OE
20 B0
19 B1
18 B2
17 B3
16 B4
15 B5
14 B6
13 B7
SA00082
PIN DESCRIPTION
PIN NUMBER SYMBOL
1, 23
CPAB /
CPBA
2, 22
SAB / SBA
3
4, 5, 6, 7,
8, 9, 10, 11
20, 19, 18, 17,
16, 15, 14, 13
DIR
A0 – A7
B0 – B7
21 OE
12 GND
24 VCC
FUNCTION
A to B clock input / B to A clock
input
A to B select input / B to A
select input
Direction control input
Data inputs/outputs (A side)
Data inputs/outputs (B side)
Output enable input
(active-Low)
Ground (0V)
Positive supply voltage
1998 Feb 17
2 853-1553 18978




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74ABT646A

Octal bus transceiver/register 3-State - NXP Semiconductors



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Octal bus transceiver/register 3-State - NXP Semiconductors



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Octal bus transceiver/register 3-State - NXP Semiconductors



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Octal bus transceiver/register 3-State - NXP Semiconductors